[llvm] 05a0798 - [SVE] Remove calls to getBitWidth from AArch64
Christopher Tetreault via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 14 10:26:53 PDT 2020
Author: Christopher Tetreault
Date: 2020-04-14T10:26:37-07:00
New Revision: 05a079895cc7ff59e7e24d1d8e6da50ad42eba2b
URL: https://github.com/llvm/llvm-project/commit/05a079895cc7ff59e7e24d1d8e6da50ad42eba2b
DIFF: https://github.com/llvm/llvm-project/commit/05a079895cc7ff59e7e24d1d8e6da50ad42eba2b.diff
LOG: [SVE] Remove calls to getBitWidth from AArch64
Reviewers: efriedma
Reviewed By: efriedma
Subscribers: danielkiss, tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D77905
Added:
Modified:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index e1179ecd78b3..c06c20d86249 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -9196,9 +9196,10 @@ bool AArch64TargetLowering::isExtFreeImpl(const Instruction *Ext) const {
/// or upper half of the vector elements.
static bool areExtractShuffleVectors(Value *Op1, Value *Op2) {
auto areTypesHalfed = [](Value *FullV, Value *HalfV) {
- auto *FullVT = cast<VectorType>(FullV->getType());
- auto *HalfVT = cast<VectorType>(HalfV->getType());
- return FullVT->getBitWidth() == 2 * HalfVT->getBitWidth();
+ auto *FullTy = FullV->getType();
+ auto *HalfTy = HalfV->getType();
+ return FullTy->getPrimitiveSizeInBits().getFixedSize() ==
+ 2 * HalfTy->getPrimitiveSizeInBits().getFixedSize();
};
auto extractHalf = [](Value *FullV, Value *HalfV) {
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