[PATCH] D77839: [llvm][CodeGen] Rename SVE gather prefetch intrinsics. [NFC]

[Andrzej Warzynski via Phabricator via llvm-commits]

andwar accepted this revision.
andwar added a comment.
This revision is now accepted and ready to land.

LGTM, thanks for the improvements!



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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:13025
+/// Combines a node carrying the intrinsic `aarch64_sve_prf<T>_gather` into a
+/// node that uses `aarch64_sve_prf<T>_gather_scaled_uxtw` when the scalar
+/// offset passed to `aarch64_sve_prf<T>_gather` is not a valid immediate for
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UPDATEME:  `aarch64_sve_prf<T>_gather_scaled_uxtw`


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Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-gather-prefetches-scalar-base-vector-indexes.ll:21
+; PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.D, <mod>]    -> 32-bit unpacked indexes
+
+define void @llvm_aarch64_sve_prfb_gather_uxtw_index_nx2vi64(<vscale x 2 x i1> %Pg, i8* %base, <vscale x 2 x i32> %indexes) nounwind {
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DELETEME


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Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-gather-prefetches-scalar-base-vector-indexes.ll:36
+  ret void
+ }
+; PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.D] -> 64-bit indexes
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Can I be followed by an empty line, please?


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  https://reviews.llvm.org/D77839/new/

https://reviews.llvm.org/D77839