[PATCH] D77795: [GlobalISel] translate freeze to new generic G_FREEZE

[Dominik Montada via Phabricator via llvm-commits]

gargaroff updated this revision to Diff 257247.
gargaroff added a comment.

introduce new generic instruction G_FREEZE


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77795/new/

https://reviews.llvm.org/D77795

Files:
  llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
  llvm/include/llvm/Support/TargetOpcodes.def
  llvm/include/llvm/Target/GenericOpcodes.td
  llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll


Index: llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
===================================================================
--- llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
+++ llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
@@ -2360,4 +2360,14 @@
   ret i64 %res
 }
 
+define i64 @test_freeze() {
+  ; CHECK-LABEL: name:            test_freeze
+  ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+  ; CHECK-NEXT: [[RES:%[0-9]+]]:_(s64) = G_FREEZE [[C]]
+  ; CHECK-NEXT: $x0 = COPY [[RES]]
+  ; CHECK-NEXT: RET_ReallyLR implicit $x0
+  %res = freeze i64 0
+  ret i64 %res
+}
+
 !0 = !{ i64 0, i64 2 }
Index: llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
===================================================================
--- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -2103,6 +2103,14 @@
   return true;
 }
 
+bool IRTranslator::translateFreeze(const llvm::User &U,
+                                   llvm::MachineIRBuilder &MIRBuilder) {
+  const Register DstReg = getOrCreateVReg(U);
+  const Register SrcReg = getOrCreateVReg(*U.getOperand(0));
+  MIRBuilder.buildInstr(TargetOpcode::G_FREEZE, {DstReg}, {SrcReg});
+  return true;
+}
+
 void IRTranslator::finishPendingPhis() {
 #ifndef NDEBUG
   DILocationVerifier Verifier;
Index: llvm/include/llvm/Target/GenericOpcodes.td
===================================================================
--- llvm/include/llvm/Target/GenericOpcodes.td
+++ llvm/include/llvm/Target/GenericOpcodes.td
@@ -203,6 +203,12 @@
   let hasSideEffects = 1;
 }
 
+def G_FREEZE : GenericInstruction {
+  let OutOperandList = (outs type0:$dst);
+  let InOperandList = (ins type0:$src);
+  let hasSideEffects = 0;
+}
+
 //------------------------------------------------------------------------------
 // Binary ops.
 //------------------------------------------------------------------------------
Index: llvm/include/llvm/Support/TargetOpcodes.def
===================================================================
--- llvm/include/llvm/Support/TargetOpcodes.def
+++ llvm/include/llvm/Support/TargetOpcodes.def
@@ -279,6 +279,9 @@
 /// COPY is the relevant instruction.
 HANDLE_TARGET_OPCODE(G_BITCAST)
 
+/// Generic freeze.
+HANDLE_TARGET_OPCODE(G_FREEZE)
+
 /// INTRINSIC trunc intrinsic.
 HANDLE_TARGET_OPCODE(G_INTRINSIC_TRUNC)
 
Index: llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
===================================================================
--- llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
+++ llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
@@ -452,6 +452,7 @@
   bool translateAtomicCmpXchg(const User &U, MachineIRBuilder &MIRBuilder);
   bool translateAtomicRMW(const User &U, MachineIRBuilder &MIRBuilder);
   bool translateFence(const User &U, MachineIRBuilder &MIRBuilder);
+  bool translateFreeze(const User &U, MachineIRBuilder &MIRBuilder);
 
   // Stubs to keep the compiler happy while we implement the rest of the
   // translation.
@@ -482,9 +483,6 @@
   bool translateUserOp2(const User &U, MachineIRBuilder &MIRBuilder) {
     return false;
   }
-  bool translateFreeze(const User &U, MachineIRBuilder &MIRBuilder) {
-    return false;
-  }
 
   /// @}
 


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D77795.257247.patch
Type: text/x-patch
Size: 3224 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200414/02b0822c/attachment.bin>