[PATCH] D76212: [X86] Make v32i16/v64i8 legal types without avx512bw. Use custom splitting instead.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:19833
 
-    In = DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op),
-                     MVT::v16i8, In, DAG.getUNDEF(MVT::v8i8));
-    return DAG.getNode(ExtendInVecOpc, dl, VT, In);
+    return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, Lo, Hi);
   }
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RKSimon wrote:
> Maybe update LowerVectorIntUnary so we can use it here? We just need to relax the requirement that the src/dst vector element types are equal which doesn't seem to really necessary.
I think that requires us to pass the desired result VT to it so we need to update all call sites. I'm happy to do that, but wanted to make sure that's what you want.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D76212/new/

https://reviews.llvm.org/D76212