[PATCH] D78049: [SelectionDAG] Always preserve offset in MachinePointerInfo

[Eli Friedman via Phabricator via llvm-commits]

efriedma created this revision.
efriedma added reviewers: craig.topper, RKSimon, arsenm.
Herald added subscribers: kerbowa, nhaehnle, wdng, jvesely, nemanjai.
Herald added a project: LLVM.
efriedma added a child revision: D77687: [SelectionDAG] Fix usage of Align constructing MachineMemOperands.
Herald added a subscriber: wuzish.

Previously, getWithOffset() would drop the offset if the base was null. Because of this, MachineMemOperand would return the wrong result from getAlign() in these cases.  MachineMemOperand stores the alignment of the pointer without the offset.

A bunch of MIR tests changed because we print the offset now.

Split off from D77687 <https://reviews.llvm.org/D77687>.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D78049

Files:
  llvm/include/llvm/CodeGen/MachineMemOperand.h
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant-32bit.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-constant-32bit.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-constant-32bit.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
  llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-load-store.mir
  llvm/test/CodeGen/PowerPC/aix-cc-abi.ll
  llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-32.mir
  llvm/test/CodeGen/X86/GlobalISel/legalize-undef.mir
  llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp