[llvm] aa08172 - [NFC][PowerPC] Add a new test case early-ret-verify.mir

[Kang Zhang via llvm-commits]

Author: Kang Zhang
Date: 2020-04-13T03:48:35Z
New Revision: aa081721d45f2260b38fdba7896ef386e24fefe8

URL: https://github.com/llvm/llvm-project/commit/aa081721d45f2260b38fdba7896ef386e24fefe8
DIFF: https://github.com/llvm/llvm-project/commit/aa081721d45f2260b38fdba7896ef386e24fefe8.diff

LOG: [NFC][PowerPC] Add a new test case early-ret-verify.mir

Added: 
    llvm/test/CodeGen/PowerPC/early-ret-verify.mir

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/CodeGen/PowerPC/early-ret-verify.mir b/llvm/test/CodeGen/PowerPC/early-ret-verify.mir
new file mode 100644
index 000000000000..1d316020ec3e
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/early-ret-verify.mir
@@ -0,0 +1,60 @@
+# RUN: llc -mtriple powerpc64le-unknown-linux-gnu -run-pass=ppc-early-ret -o \
+# RUN:   - %s | FileCheck %s
+
+---
+name:            testEarlyRet
+body:             |
+  bb.0.entry:
+    successors: %bb.4(0x40000000), %bb.1(0x40000000)
+  
+    BC undef renamable $cr5lt, %bb.4
+  
+  bb.1:
+    successors: %bb.2(0x80000000)
+  
+    renamable $r3 = IMPLICIT_DEF
+    renamable $r4 = IMPLICIT_DEF
+  
+  bb.2:
+    successors: %bb.3(0x80000000)
+    liveins: $r3, $r4
+  
+    $r5 = OR $r4, $r4
+    renamable $r4 = ADDIC killed $r4, 1, implicit-def $carry
+    $r6 = OR $r3, $r3
+    renamable $r3 = ADDZE killed $r3, implicit-def dead $carry, implicit killed $carry
+    renamable $cr0 = CMPLW renamable $r3, killed renamable $r6
+    renamable $cr5lt = CRANDC renamable $cr0lt, renamable $cr0eq
+    renamable $cr1 = CMPLW renamable $r4, killed renamable $r5
+    BCLR killed renamable $cr5lt, implicit $lr, implicit $rm
+  
+  bb.3:
+    successors: %bb.4(0x02082082), %bb.2(0x7df7df7e)
+    liveins: $cr0, $cr1, $r3, $r4
+  
+    renamable $cr5lt = CRAND killed renamable $cr0eq, killed renamable $cr1lt, implicit $cr1, implicit $cr0
+    BCn killed renamable $cr5lt, %bb.2
+  
+  bb.4:
+    BLR implicit $lr, implicit $rm
+
+  ; CHECK-LABEL: testEarlyRet
+  ; CHECK: bb.0.entry:
+  ; CHECK:   BCLR $cr5lt, implicit $lr, implicit $rm, implicit $lr, implicit $rm
+  ; CHECK: bb.1:
+  ; CHECK:   renamable $r3 = IMPLICIT_DEF
+  ; CHECK:   renamable $r4 = IMPLICIT_DEF
+  ; CHECK: bb.2:
+  ; CHECK:   $r5 = OR $r4, $r4
+  ; CHECK:   renamable $r4 = ADDIC killed $r4, 1, implicit-def $carry
+  ; CHECK:   $r6 = OR $r3, $r3
+  ; CHECK:   renamable $r3 = ADDZE killed $r3, implicit-def dead $carry, implicit killed $carry
+  ; CHECK:   renamable $cr0 = CMPLW renamable $r3, killed renamable $r6
+  ; CHECK:   renamable $cr5lt = CRANDC renamable $cr0lt, renamable $cr0eq
+  ; CHECK:   renamable $cr1 = CMPLW renamable $r4, killed renamable $r5
+  ; CHECK:   BCLR killed renamable $cr5lt, implicit $lr, implicit $rm
+  ; CHECK: bb.3:
+  ; CHECK:   renamable $cr5lt = CRAND killed renamable $cr0eq, killed renamable $cr1lt, implicit $cr1, implicit $cr0
+  ; CHECK:   BCn killed renamable $cr5lt, %bb.2
+  ; CHECK:   BLR implicit $lr, implicit $rm
+...