[PATCH] D77928: [X86] Enable shuffle combining for AVX512 unless the root is used by a vselect

[Craig Topper via Phabricator via llvm-commits]

craig.topper marked 2 inline comments as done.
craig.topper added inline comments.


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:34071
+  if (RootSizeInBits == 512 || (Subtarget.hasVLX() && RootSizeInBits >= 128)) {
+    if (Root.hasOneUse() && Root->use_begin()->getOpcode() == ISD::VSELECT &&
+        Root->use_begin()->getOperand(0).getScalarValueSizeInBits() == 1) {
----------------
RKSimon wrote:
> Do we need to peek through bitcasts at all?
Maybe, but then element count checks at some of the uses of IsMaskedShuffle would also need to be adjusted? Since NumRootElts wouldn't reflect the bitcast.


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:34163
+                       (Mask[0] < 0 || Mask[2] < 0 || Mask[0] == (Mask[2] % 2)) &&
+                       (Mask[1] < 0 || Mask[3] < 0 || Mask[1] == (Mask[3] % 2));
+
----------------
RKSimon wrote:
> It might be better to use BaseMask directly - its already dealt with the widening so the mask matching should be easier?
That would simplify things if we were looking for a 256-bit wide "element". But we're only looking for repeated lane so there's no guarantee the mask can widened to 2 elements.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77928/new/

https://reviews.llvm.org/D77928