[llvm] 1747ba2 - GlobalISel: Fix typo in assert message
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Sat Apr 11 13:02:35 PDT 2020
Author: Matt Arsenault
Date: 2020-04-11T16:02:26-04:00
New Revision: 1747ba25b23a110a963f02094c0c5aa62957f9ce
URL: https://github.com/llvm/llvm-project/commit/1747ba25b23a110a963f02094c0c5aa62957f9ce
DIFF: https://github.com/llvm/llvm-project/commit/1747ba25b23a110a963f02094c0c5aa62957f9ce.diff
LOG: GlobalISel: Fix typo in assert message
Added:
Modified:
llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index fffb3913b7df..168b78457c25 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -2607,7 +2607,7 @@ LegalizerHelper::fewerElementsVectorBasic(MachineInstr &MI, unsigned TypeIdx,
const Register DstReg = MI.getOperand(0).getReg();
const unsigned Flags = MI.getFlags();
- assert(NumOps <= 3 && "expected instrution with 1 result and 1-3 sources");
+ assert(NumOps <= 3 && "expected instruction with 1 result and 1-3 sources");
SmallVector<Register, 8> ExtractedRegs[3];
SmallVector<Register, 8> Parts;
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