[PATCH] D77207: [AVR] Fix I/O instructions on XMEGA
Dylan McKay via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Apr 11 01:34:27 PDT 2020
dylanmckay added a comment.
Nice work, I didn't know of this particular XMEGA quirk.
I left a couple comments, then it looks good to merge.
Could you also add a CodeGen test to `test/CodeGen/AVR/features` for an XMEGA chip, along with a `CHECK` line that verifies that the correct assembly output is generated for XMEGA?
================
Comment at: llvm/lib/Target/AVR/AVRDevices.td:127
+ "true", "The device has CPU registers "
+ "mapped in data addres space">;
+
----------------
add an extra `s` to `addres`
================
Comment at: llvm/lib/Target/AVR/AVRInstrInfo.td:110
[{
- return CurDAG->getTargetConstant(uint8_t(N->getZExtValue()) - 0x20, SDLoc(N), MVT::i8);
+ uint8_t offset = Subtarget->hasMemMappedGPR() ? 0x20 : 0x0;
+ return CurDAG->getTargetConstant(uint8_t(N->getZExtValue()) - offset,
----------------
Rather than hardcoding these magic constants in this file, recommend adding a new method to `AVRSubtarget`, like `uint8_t getIoRegisterOffset()` and moving the ternary logic there.
Reuse this method in the below `PatLeaf`s
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D77207/new/
https://reviews.llvm.org/D77207
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