[PATCH] D77849: [calcspillweights] mark LiveIntervals from INLINEASM_BR defs as not spillable
Nick Desaulniers via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 10 17:15:09 PDT 2020
nickdesaulniers added inline comments.
================
Comment at: llvm/test/CodeGen/X86/callbr-asm-regalloc.ll:10
+
+%struct.d = type { i8* }
+%struct.b = type {}
----------------
arsenm wrote:
> This test is way too complicated. This really needs a MIR test
That's fair. It would be better to more precisely represent and test the issue, which would also aid review. And it's time I learn to write some MIR tests. For dumping MIR, do I just do `llc -print-after=finalize-isel` and write that to a file? Is there an existing MIR test that you recommend I refer to in order to understand testing for cases where specific registers need to be or not to be spilled?
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rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D77849/new/
https://reviews.llvm.org/D77849
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