[PATCH] D77888: Add -debugify-and-strip-all to add debug info before a pass and remove it after

Daniel Sanders via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 10 16:42:44 PDT 2020


This revision was automatically updated to reflect the committed changes.
Closed by commit rGf71350f05ae1: Add -debugify-and-strip-all to add debug info before a pass and remove it after (authored by dsanders).

Changed prior to commit:
  https://reviews.llvm.org/D77888?vs=256617&id=256703#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77888/new/

https://reviews.llvm.org/D77888

Files:
  llvm/include/llvm/CodeGen/TargetPassConfig.h
  llvm/lib/CodeGen/MachineDebugify.cpp
  llvm/lib/CodeGen/MachineStripDebug.cpp
  llvm/lib/CodeGen/TargetPassConfig.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
  llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir
  llvm/test/CodeGen/AArch64/O0-pipeline.ll
  llvm/test/CodeGen/AArch64/O3-pipeline.ll
  llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll
  llvm/test/CodeGen/AArch64/fastisel-debugvalue-undef.ll
  llvm/test/CodeGen/AArch64/patchable-function-entry-empty.mir
  llvm/test/CodeGen/AArch64/prologue-epilogue-remarks.mir
  llvm/test/CodeGen/AArch64/seqpairspill.mir
  llvm/test/CodeGen/AArch64/stp-opt-with-renaming-debug.mir

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