[lld] 7f36cb1 - [AArch64InstPrinter] Change printAlignedLabel to print the target address in hexadecimal form

Fangrui Song via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 10 09:21:20 PDT 2020


Author: Fangrui Song
Date: 2020-04-10T09:21:09-07:00
New Revision: 7f36cb1f1a4ed93cfb19bf2183d150571313ec98

URL: https://github.com/llvm/llvm-project/commit/7f36cb1f1a4ed93cfb19bf2183d150571313ec98
DIFF: https://github.com/llvm/llvm-project/commit/7f36cb1f1a4ed93cfb19bf2183d150571313ec98.diff

LOG: [AArch64InstPrinter] Change printAlignedLabel to print the target address in hexadecimal form

Similar to D76580 (x86) and D76591 (PPC).

```
// llvm-objdump -d output (before)
10000: 08 00 00 94                   bl      #32
10004: 08 00 00 94                   bl      #32

// llvm-objdump -d output (after)
10000: 08 00 00 94                   bl      0x10020
10004: 08 00 00 94                   bl      0x10024

// GNU objdump -d. The lack of 0x is not ideal due to ambiguity.
10000:       94000008        bl      10020 <bar+0x18>
10004:       94000008        bl      10024 <bar+0x1c>
```

The new output makes it easier to find the jump target.

Differential Revision: https://reviews.llvm.org/D77853

Added: 
    

Modified: 
    lld/test/COFF/arm64-delayimport.yaml
    lld/test/COFF/arm64-import2.test
    lld/test/COFF/arm64-relocs-imports.test
    lld/test/COFF/arm64-thunks.s
    lld/test/ELF/aarch64-call26-thunk.s
    lld/test/ELF/aarch64-condb-reloc.s
    lld/test/ELF/aarch64-cortex-a53-843419-address.s
    lld/test/ELF/aarch64-cortex-a53-843419-large.s
    lld/test/ELF/aarch64-cortex-a53-843419-large2.s
    lld/test/ELF/aarch64-cortex-a53-843419-recognize.s
    lld/test/ELF/aarch64-cortex-a53-843419-thunk.s
    lld/test/ELF/aarch64-feature-bti.s
    lld/test/ELF/aarch64-feature-btipac.s
    lld/test/ELF/aarch64-feature-pac.s
    lld/test/ELF/aarch64-gnu-ifunc-plt.s
    lld/test/ELF/aarch64-gnu-ifunc.s
    lld/test/ELF/aarch64-jump26-thunk.s
    lld/test/ELF/aarch64-plt.s
    lld/test/ELF/aarch64-relocs.s
    lld/test/ELF/aarch64-thunk-pi.s
    lld/test/ELF/aarch64-thunk-script.s
    lld/test/ELF/aarch64-thunk-section-location.s
    lld/test/ELF/aarch64-tstbr14-reloc.s
    lld/test/ELF/aarch64-undefined-weak.s
    lld/test/ELF/pr34660.s
    lld/test/ELF/relocation-b-aarch64.test
    llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
    llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll
    llvm/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll
    llvm/test/tools/llvm-objdump/MachO/AArch64/pc-rel-targets.test

Removed: 
    


################################################################################
diff  --git a/lld/test/COFF/arm64-delayimport.yaml b/lld/test/COFF/arm64-delayimport.yaml
index 122dd1dea6e4..6bab185b0c59 100644
--- a/lld/test/COFF/arm64-delayimport.yaml
+++ b/lld/test/COFF/arm64-delayimport.yaml
@@ -7,7 +7,7 @@
 
 # DISASM:  140001014:      11 00 00 d0     adrp    x17, #8192
 # DISASM:  140001018:      31 22 00 91     add     x17, x17, #8
-# DISASM:  14000101c:      01 00 00 14     b       #4 <.text+0x20>
+# DISASM:  14000101c:      01 00 00 14     b       0x140001020 <.text+0x20>
 # DISASM:  140001020:      fd 7b b3 a9     stp     x29, x30, [sp, #-208]!
 # DISASM:  140001024:      fd 03 00 91     mov     x29, sp
 # DISASM:  140001028:      e0 07 01 a9     stp     x0, x1, [sp, #16]
@@ -21,7 +21,7 @@
 # DISASM:  140001048:      e1 03 11 aa     mov     x1, x17
 # DISASM:  14000104c:      00 00 00 b0     adrp    x0, #4096
 # DISASM:  140001050:      00 00 00 91     add     x0, x0, #0
-# DISASM:  140001054:      eb ff ff 97     bl      #-84 <.text>
+# DISASM:  140001054:      eb ff ff 97     bl      0x140001000 <.text>
 # DISASM:  140001058:      f0 03 00 aa     mov     x16, x0
 # DISASM:  14000105c:      e6 9f 45 ad     ldp     q6, q7, [sp, #176]
 # DISASM:  140001060:      e4 97 44 ad     ldp     q4, q5, [sp, #144]

diff  --git a/lld/test/COFF/arm64-import2.test b/lld/test/COFF/arm64-import2.test
index d4b4c83d6216..7f7455b94891 100644
--- a/lld/test/COFF/arm64-import2.test
+++ b/lld/test/COFF/arm64-import2.test
@@ -8,14 +8,14 @@
 
 # BEFORE: Disassembly of section .text:
 # BEFORE-EMPTY:
-# BEFORE:        0:       00 00 00 94     bl      #0
-# BEFORE:        4:       00 00 00 94     bl      #0
+# BEFORE:        0:       00 00 00 94     bl      0x0
+# BEFORE:        4:       00 00 00 94     bl      0x4
 # BEFORE:        8:       c0 03 5f d6     ret
 
 # AFTER: Disassembly of section .text:
 # AFTER-EMPTY:
-# AFTER:  140001000:      03 00 00 94     bl      #12
-# AFTER:  140001004:      05 00 00 94     bl      #20
+# AFTER:  140001000:      03 00 00 94     bl      0x14000100c
+# AFTER:  140001004:      05 00 00 94     bl      0x140001018
 # AFTER:  140001008:      c0 03 5f d6     ret
 # AFTER:  14000100c:      10 00 00 b0     adrp    x16, #4096
 # AFTER:  140001010:      10 32 40 f9     ldr     x16, [x16, #96]

diff  --git a/lld/test/COFF/arm64-relocs-imports.test b/lld/test/COFF/arm64-relocs-imports.test
index 539f9b790734..7364fb06f7c8 100644
--- a/lld/test/COFF/arm64-relocs-imports.test
+++ b/lld/test/COFF/arm64-relocs-imports.test
@@ -10,7 +10,7 @@
 # BEFORE:        0:       fe 0f 1f f8     str     x30, [sp, #-16]!
 # BEFORE:        4:       00 00 00 90     adrp    x0, #0
 # BEFORE:        8:       00 08 00 91     add     x0, x0, #2
-# BEFORE:        c:       00 00 00 94     bl      #0
+# BEFORE:        c:       00 00 00 94     bl      0xc
 # BEFORE:       10:       00 01 40 39     ldrb    w0, [x8]
 # BEFORE:       14:       00 01 40 79     ldrh    w0, [x8]
 # BEFORE:       18:       00 01 40 b9     ldr     w0, [x8]
@@ -44,8 +44,8 @@
 # BEFORE:       88:       00 00 40 f9     ldr     x0, [x0]
 # BEFORE:       8c:       01 00 00 00     udf #1
 # BEFORE:       90:       20 1a 09 30     adr x0, #74565
-# BEFORE:       94:       01 00 00 54     b.ne    #0
-# BEFORE:       98:       00 00 00 36     tbz     w0, #0, #0
+# BEFORE:       94:       01 00 00 54     b.ne    0x94
+# BEFORE:       98:       00 00 00 36     tbz     w0, #0, 0x98
 # BEFORE:       9c:       01 00 00 00     udf #1
 
 # AFTER: Disassembly of section .text:
@@ -53,7 +53,7 @@
 # AFTER:  140001000:      fe 0f 1f f8     str     x30, [sp, #-16]!
 # AFTER:  140001004:      00 00 00 b0     adrp    x0, #4096
 # AFTER:  140001008:      00 18 00 91     add     x0, x0, #6
-# AFTER:  14000100c:      25 00 00 94     bl      #148
+# AFTER:  14000100c:      25 00 00 94     bl      0x1400010a0
 # AFTER:  140001010:      00 21 40 39     ldrb    w0, [x8, #8]
 # AFTER:  140001014:      00 11 40 79     ldrh    w0, [x8, #8]
 # AFTER:  140001018:      00 09 40 b9     ldr     w0, [x8, #8]
@@ -87,8 +87,8 @@
 # AFTER:  140001088:      00 c4 41 f9     ldr     x0, [x0, #904]
 # AFTER:  14000108c:      03 00 00 00     udf #3
 # AFTER:  140001090:      e0 95 09 30     adr     x0, #78525
-# AFTER:  140001094:      61 00 00 54     b.ne    #12
-# AFTER:  140001098:      40 00 00 36     tbz     w0, #0, #8
+# AFTER:  140001094:      61 00 00 54     b.ne    0x1400010a0
+# AFTER:  140001098:      40 00 00 36     tbz     w0, #0, 0x1400010a0
 # AFTER:  14000109c:      61 ff ff ff     <unknown>
 # AFTER:  1400010a0:      10 00 00 b0     adrp    x16, #4096
 # AFTER:  1400010a4:      10 2a 40 f9     ldr     x16, [x16, #80]

diff  --git a/lld/test/COFF/arm64-thunks.s b/lld/test/COFF/arm64-thunks.s
index 17f87ff8fcdb..9ddae6281d72 100644
--- a/lld/test/COFF/arm64-thunks.s
+++ b/lld/test/COFF/arm64-thunks.s
@@ -27,13 +27,13 @@ func2:
     ret
 
 // DISASM: 0000000140001000 <.text>:
-// DISASM: 140001000:      40 00 00 36     tbz     w0, #0, #8 <.text+0x8>
+// DISASM: 140001000:      40 00 00 36     tbz     w0, #0, 0x140001008 <.text+0x8>
 // DISASM: 140001004:      c0 03 5f d6     ret
 // DISASM: 140001008:      50 00 00 90     adrp    x16, #32768
 // DISASM: 14000100c:      10 52 00 91     add     x16, x16, #20
 // DISASM: 140001010:      00 02 1f d6     br      x16
 
-// DISASM: 140009014:      60 00 00 36     tbz     w0, #0, #12 <.text+0x8020>
+// DISASM: 140009014:      60 00 00 36     tbz     w0, #0, 0x140009020 <.text+0x8020>
 // DISASM: 140009018:      c0 03 5f d6     ret
 
 // DISASM: 140009020:      50 00 00 90     adrp    x16, #32768

diff  --git a/lld/test/ELF/aarch64-call26-thunk.s b/lld/test/ELF/aarch64-call26-thunk.s
index d41a68dd5e21..1d95abc6e513 100644
--- a/lld/test/ELF/aarch64-call26-thunk.s
+++ b/lld/test/ELF/aarch64-call26-thunk.s
@@ -12,9 +12,9 @@ _start:
 // CHECK: Disassembly of section .text:
 // CHECK-EMPTY:
 // CHECK-NEXT: <_start>:
-// CHECK-NEXT:    210120:       bl      #4
+// CHECK-NEXT:    210120:       bl      0x210124
 // CHECK: <__AArch64AbsLongThunk_big>:
-// CHECK-NEXT:    210124:       ldr     x16, #8
+// CHECK-NEXT:    210124:       ldr     x16, 0x21012c
 // CHECK-NEXT:    210128:       br      x16
 // CHECK: <$d>:
 // CHECK-NEXT:    21012c:       00 00 00 00     .word   0x00000000

diff  --git a/lld/test/ELF/aarch64-condb-reloc.s b/lld/test/ELF/aarch64-condb-reloc.s
index 8db1ebd1b3a8..06c7b0a82210 100644
--- a/lld/test/ELF/aarch64-condb-reloc.s
+++ b/lld/test/ELF/aarch64-condb-reloc.s
@@ -25,9 +25,9 @@
 # CHECK-NEXT:    21013c: nop
 # CHECK-NEXT:    210140: nop
 # CHECK:      <_start>:
-# CHECK-NEXT:    210144: b.eq #-36 <_foo>
-# CHECK-NEXT:    210148: b.eq #-24 <_bar>
-# CHECK-NEXT:    21014c: b.eq #-16 <_dah>
+# CHECK-NEXT:    210144: b.eq 0x210120 <_foo>
+# CHECK-NEXT:    210148: b.eq 0x210130 <_bar>
+# CHECK-NEXT:    21014c: b.eq 0x21013c <_dah>
 
 #DSOREL:      Section {
 #DSOREL:        Index:
@@ -68,9 +68,9 @@
 #DSO-NEXT:     10354: nop
 #DSO-NEXT:     10358: nop
 #DSO:      <_start>:
-#DSO-NEXT:     1035c: b.eq #52 <_foo at plt>
-#DSO-NEXT:     10360: b.eq #64 <_bar at plt>
-#DSO-NEXT:     10364: b.eq #76 <_dah at plt>
+#DSO-NEXT:     1035c: b.eq 0x10390 <_foo at plt>
+#DSO-NEXT:     10360: b.eq 0x103a0 <_bar at plt>
+#DSO-NEXT:     10364: b.eq 0x103b0 <_dah at plt>
 #DSO-EMPTY:
 #DSO-NEXT: Disassembly of section .plt:
 #DSO-EMPTY:

diff  --git a/lld/test/ELF/aarch64-cortex-a53-843419-address.s b/lld/test/ELF/aarch64-cortex-a53-843419-address.s
index 976c485bb2c9..186ff550aa88 100644
--- a/lld/test/ELF/aarch64-cortex-a53-843419-address.s
+++ b/lld/test/ELF/aarch64-cortex-a53-843419-address.s
@@ -40,7 +40,7 @@
 // CHECK: <t3_ff8_ldr>:
 // CHECK-NEXT:      ff8:        20 00 00 d0     adrp    x0, #24576
 // CHECK-NEXT:      ffc:        21 00 40 f9     ldr             x1, [x1]
-// CHECK-NEXT:     1000:        f9 0f 00 14     b       #16356
+// CHECK-NEXT:     1000:        f9 0f 00 14     b       0x4fe4
 // CHECK-NEXT:     1004:        c0 03 5f d6     ret
         .section .text.01, "ax", %progbits
         .balign 4096
@@ -62,7 +62,7 @@ $x.999:
 // CHECK: <t3_ffc_ldrsimd>:
 // CHECK-NEXT:     1ffc:        20 00 00 b0     adrp    x0, #20480
 // CHECK-NEXT:     2000:        21 00 40 bd     ldr             s1, [x1]
-// CHECK-NEXT:     2004:        fa 0b 00 14     b       #12264
+// CHECK-NEXT:     2004:        fa 0b 00 14     b       0x4fec
 // CHECK-NEXT:     2008:        c0 03 5f d6     ret
         .globl t3_ffc_ldrsimd
         .type t3_ffc_ldrsimd, %function
@@ -99,7 +99,7 @@ t3_ff8_ldralldata:
 // CHECK: <t3_ffc_ldr>:
 // CHECK-NEXT:     3ff8:        00 00 00 f0     adrp    x0, #12288
 // CHECK-NEXT:     3ffc:        21 00 40 f9     ldr             x1, [x1]
-// CHECK-NEXT:     4000:        fd 03 00 14     b       #4084
+// CHECK-NEXT:     4000:        fd 03 00 14     b       0x4ff4
 // CHECK-NEXT:     4004:        c0 03 5f d6     ret
         .space 4096 - 12
         .globl t3_ffc_ldr
@@ -112,13 +112,13 @@ t3_ff8_ldralldata:
 
 // CHECK: <__CortexA53843419_1000>:
 // CHECK-NEXT:     4fe4:        00 0c 40 f9     ldr     x0, [x0, #24]
-// CHECK-NEXT:     4fe8:        07 f0 ff 17     b       #-16356
+// CHECK-NEXT:     4fe8:        07 f0 ff 17     b       0x1004
 // CHECK: <__CortexA53843419_2004>:
 // CHECK-NEXT:     4fec:        02 0c 40 f9     ldr     x2, [x0, #24]
-// CHECK-NEXT:     4ff0:        06 f4 ff 17     b       #-12264
+// CHECK-NEXT:     4ff0:        06 f4 ff 17     b       0x2008
 // CHECK: <__CortexA53843419_4000>:
 // CHECK-NEXT:     4ff4:        00 0c 40 f9     ldr     x0, [x0, #24]
-// CHECK-NEXT:     4ff8:        03 fc ff 17     b       #-4084
+// CHECK-NEXT:     4ff8:        03 fc ff 17     b       0x4004
 
         .section .text.02, "ax", %progbits
         .space 4096 - 36
@@ -131,7 +131,7 @@ t3_ff8_ldralldata:
 // CHECK: <t3_ffc_str>:
 // CHECK-NEXT:     4ffc:        00 00 00 d0     adrp    x0, #8192
 // CHECK-NEXT:     5000:        21 00 00 f9     str             x1, [x1]
-// CHECK-NEXT:     5004:        fb 03 00 14     b       #4076
+// CHECK-NEXT:     5004:        fb 03 00 14     b       0x5ff0
 // CHECK-NEXT:     5008:        c0 03 5f d6     ret
 
         .section .newisd, "ax", %progbits
@@ -146,7 +146,7 @@ t3_ffc_str:
 
 // CHECK: <__CortexA53843419_5004>:
 // CHECK-NEXT:     5ff0:        00 0c 40 f9     ldr     x0, [x0, #24]
-// CHECK-NEXT:     5ff4:        05 fc ff 17     b       #-4076
+// CHECK-NEXT:     5ff4:        05 fc ff 17     b       0x5008
 
         // Start a new OutputSection (see Linker Script) so the
         // start address will be affected by any patches added to previous
@@ -156,7 +156,7 @@ t3_ffc_str:
 // CHECK: <t3_ff8_str>:
 // CHECK-NEXT:     5ff8:        00 00 00 b0     adrp    x0, #4096
 // CHECK-NEXT:     5ffc:        21 00 00 f9     str             x1, [x1]
-// CHECK-NEXT:     6000:        03 00 00 14     b       #12
+// CHECK-NEXT:     6000:        03 00 00 14     b       0x600c
 // CHECK-NEXT:     6004:        c0 03 5f d6     ret
 
         .section .newos, "ax", %progbits
@@ -174,7 +174,7 @@ _start:
 
 // CHECK: <__CortexA53843419_6000>:
 // CHECK-NEXT:     600c:        00 0c 40 f9     ldr     x0, [x0, #24]
-// CHECK-NEXT:     6010:        fd ff ff 17     b       #-12
+// CHECK-NEXT:     6010:        fd ff ff 17     b       0x6004
 
         .data
         .globl dat

diff  --git a/lld/test/ELF/aarch64-cortex-a53-843419-large.s b/lld/test/ELF/aarch64-cortex-a53-843419-large.s
index e42303970f7b..fcce9cd1a232 100644
--- a/lld/test/ELF/aarch64-cortex-a53-843419-large.s
+++ b/lld/test/ELF/aarch64-cortex-a53-843419-large.s
@@ -13,7 +13,7 @@
 // required.					      
 						      
 // CHECK1:  <__AArch64AbsLongThunk_need_thunk_after_patch>:
-// CHECK1-NEXT:    210000:       50 00 00 58     ldr     x16, #8
+// CHECK1-NEXT:    210000:       50 00 00 58     ldr     x16, 0x210008
 // CHECK1-NEXT:    210004:       00 02 1f d6     br      x16
 // CHECK1: <$d>:
 // CHECK1-NEXT:    210008:       0c 10 21 08     .word   0x0821100c
@@ -29,7 +29,7 @@ _start:
         .space 4096 - 12
 
 // CHECK2: <_start>:
-// CHECK2-NEXT:    211000:       00 fc ff 97     bl      #-4096
+// CHECK2-NEXT:    211000:       00 fc ff 97     bl      0x210000
 
         // Expect patch on pass 1
         .section .text.03, "ax", %progbits
@@ -44,7 +44,7 @@ t3_ff8_ldr:
 // CHECK3: <t3_ff8_ldr>:
 // CHECK3-NEXT:    211ff8:       e0 00 04 f0     adrp    x0, #134344704
 // CHECK3-NEXT:    211ffc:       21 00 40 f9     ldr     x1, [x1]
-// CHECK3-NEXT:    212000:       02 08 80 15     b       #100671496
+// CHECK3-NEXT:    212000:       02 08 80 15     b       0x6214008
 // CHECK3-NEXT:    212004:       c0 03 5f d6     ret
 
         .section .text.04, "ax", %progbits
@@ -65,7 +65,7 @@ t3_ff8_str:
 // CHECK4: <t3_ff8_str>:
 // CHECK4-NEXT:  4213ff8:       e0 00 02 b0     adrp    x0, #67227648
 // CHECK4-NEXT:  4213ffc:       21 00 40 f9     ldr     x1, [x1]
-// CHECK4-NEXT:  4214000:       04 00 80 14     b       #33554448
+// CHECK4-NEXT:  4214000:       04 00 80 14     b       0x6214010
 // CHECK4-NEXT:  4214004:       c0 03 5f d6     ret
 
         .section .text.06, "ax", %progbits
@@ -73,10 +73,10 @@ t3_ff8_str:
 
 // CHECK5: <__CortexA53843419_211000>:
 // CHECK5-NEXT:  6214008:       00 00 40 f9     ldr     x0, [x0]
-// CHECK5-NEXT:  621400c:       fe f7 7f 16     b       #-100671496
+// CHECK5-NEXT:  621400c:       fe f7 7f 16     b       0x212004
 // CHECK5: <__CortexA53843419_4213000>:
 // CHECK5-NEXT:  6214010:       00 00 00 f9     str     x0, [x0]
-// CHECK5-NEXT:  6214014:       fc ff 7f 17     b       #-33554448
+// CHECK5-NEXT:  6214014:       fc ff 7f 17     b       0x4214004
 
         .section .text.07, "ax", %progbits
         .space (32 * 1024 * 1024) - 12300
@@ -104,11 +104,11 @@ t3_ffc_ldr:
 // CHECK7: <t3_ffc_ldr>:
 // CHECK7-NEXT:  8211ffc:       e0 00 00 f0     adrp    x0, #126976
 // CHECK7-NEXT:  8212000:       21 00 40 f9     ldr     x1, [x1]
-// CHECK7-NEXT:  8212004:       02 00 00 14     b       #8
+// CHECK7-NEXT:  8212004:       02 00 00 14     b       0x821200c
 // CHECK7-NEXT:  8212008:       c0 03 5f d6     ret
 // CHECK7: <__CortexA53843419_8212004>:
 // CHECK7-NEXT:  821200c:       00 00 40 f9     ldr     x0, [x0]
-// CHECK7-NEXT:  8212010:       fe ff ff 17     b       #-8
+// CHECK7-NEXT:  8212010:       fe ff ff 17     b       0x8212008
 
         .section .data
         .globl dat

diff  --git a/lld/test/ELF/aarch64-cortex-a53-843419-large2.s b/lld/test/ELF/aarch64-cortex-a53-843419-large2.s
index db0d5f23378b..643e97dcf472 100644
--- a/lld/test/ELF/aarch64-cortex-a53-843419-large2.s
+++ b/lld/test/ELF/aarch64-cortex-a53-843419-large2.s
@@ -9,7 +9,7 @@
 adrp x0, thunk
 ldr x1, [x1, #0]
 // CHECK: <thunk>:
-// CHECK-NEXT: b #67108872 <__CortexA53843419_8001000>
+// CHECK-NEXT: b 0xc001008 <__CortexA53843419_8001000>
 thunk:
 ldr x0, [x0, :got_lo12:thunk]
 ret

diff  --git a/lld/test/ELF/aarch64-cortex-a53-843419-recognize.s b/lld/test/ELF/aarch64-cortex-a53-843419-recognize.s
index 0a737eaa152b..823c7525ab2e 100644
--- a/lld/test/ELF/aarch64-cortex-a53-843419-recognize.s
+++ b/lld/test/ELF/aarch64-cortex-a53-843419-recognize.s
@@ -32,7 +32,7 @@
 // CHECK: <t3_ff8_ldr>:
 // CHECK-NEXT:    211ff8:        60 02 00 f0     adrp    x0, #323584
 // CHECK-NEXT:    211ffc:        21 00 40 f9     ldr             x1, [x1]
-// CHECK-FIX:     212000:        03 c8 00 14     b       #204812
+// CHECK-FIX:     212000:        03 c8 00 14     b       0x24400c
 // CHECK-NOFIX:   212000:        00 00 40 f9     ldr             x0, [x0]
 // CHECK-NEXT:    212004:        c0 03 5f d6     ret
 // CHECK-RELOCATABLE: <t3_ff8_ldr>:
@@ -56,7 +56,7 @@ t3_ff8_ldr:
 // CHECK: <t3_ff8_ldrsimd>:
 // CHECK-NEXT:    213ff8:        60 02 00 b0     adrp    x0, #315392
 // CHECK-NEXT:    213ffc:        21 00 40 bd     ldr             s1, [x1]
-// CHECK-FIX:     214000:        05 c0 00 14     b       #196628
+// CHECK-FIX:     214000:        05 c0 00 14     b       0x244014
 // CHECK-NOFIX:   214000:        02 04 40 f9     ldr     x2, [x0, #8]
 // CHECK-NEXT:    214004:        c0 03 5f d6     ret
         .section .text.02, "ax", %progbits
@@ -74,7 +74,7 @@ t3_ff8_ldrsimd:
 // CHECK: <t3_ffc_ldrpost>:
 // CHECK-NEXT:    215ffc:        40 02 00 f0     adrp    x0, #307200
 // CHECK-NEXT:    216000:        21 84 40 bc     ldr     s1, [x1], #8
-// CHECK-FIX:     216004:        06 b8 00 14     b       #188440
+// CHECK-FIX:     216004:        06 b8 00 14     b       0x24401c
 // CHECK-NOFIX:   216004:        03 08 40 f9     ldr     x3, [x0, #16]
 // CHECK-NEXT:    216008:        c0 03 5f d6     ret
         .section .text.03, "ax", %progbits
@@ -92,7 +92,7 @@ t3_ffc_ldrpost:
 // CHECK: <t3_ff8_strpre>:
 // CHECK-NEXT:    217ff8:        40 02 00 b0     adrp    x0, #299008
 // CHECK-NEXT:    217ffc:        21 8c 00 bc     str     s1, [x1, #8]!
-// CHECK-FIX:     218000:        09 b0 00 14     b       #180260
+// CHECK-FIX:     218000:        09 b0 00 14     b       0x244024
 // CHECK-NOFIX:   218000:        02 0c 40 f9     ldr     x2, [x0, #24]
 // CHECK-NEXT:    218004:        c0 03 5f d6     ret
         .section .text.04, "ax", %progbits
@@ -110,7 +110,7 @@ t3_ff8_strpre:
 // CHECK: <t3_ffc_str>:
 // CHECK-NEXT:    219ffc:        3c 02 00 f0     adrp    x28, #290816
 // CHECK-NEXT:    21a000:        42 00 00 f9     str             x2, [x2]
-// CHECK-FIX:     21a004:        0a a8 00 14     b       #172072
+// CHECK-FIX:     21a004:        0a a8 00 14     b       0x24402c
 // CHECK-NOFIX:   21a004:        9c 13 00 f9     str     x28, [x28, #32]
 // CHECK-NEXT:    21a008:        c0 03 5f d6     ret
         .section .text.05, "ax", %progbits
@@ -128,7 +128,7 @@ t3_ffc_str:
 // CHECK: <t3_ffc_strsimd>:
 // CHECK-NEXT:    21bffc:        3c 02 00 b0     adrp    x28, #282624
 // CHECK-NEXT:    21c000:        44 00 00 b9     str             w4, [x2]
-// CHECK-FIX:     21c004:        0c a0 00 14     b       #163888
+// CHECK-FIX:     21c004:        0c a0 00 14     b       0x244034
 // CHECK-NOFIX:   21c004:        84 17 00 f9     str     x4, [x28, #40]
 // CHECK-NEXT:    21c008:        c0 03 5f d6     ret
         .section .text.06, "ax", %progbits
@@ -146,7 +146,7 @@ t3_ffc_strsimd:
 // CHECK: <t3_ff8_ldrunpriv>:
 // CHECK-NEXT:    21dff8:        1d 02 00 f0     adrp    x29, #274432
 // CHECK-NEXT:    21dffc:        41 08 40 38     ldtrb           w1, [x2]
-// CHECK-FIX:     21e000:        0f 98 00 14     b       #155708
+// CHECK-FIX:     21e000:        0f 98 00 14     b       0x24403c
 // CHECK-NOFIX:   21e000:        bd 03 40 f9     ldr             x29, [x29]
 // CHECK-NEXT:    21e004:        c0 03 5f d6     ret
         .section .text.07, "ax", %progbits
@@ -164,7 +164,7 @@ t3_ff8_ldrunpriv:
 // CHECK: <t3_ffc_ldur>:
 // CHECK-NEXT:    21fffc:        1d 02 00 b0     adrp    x29, #266240
 // CHECK-NEXT:    220000:        42 40 40 b8     ldur    w2, [x2, #4]
-// CHECK-FIX:     220004:        10 90 00 14     b       #147520
+// CHECK-FIX:     220004:        10 90 00 14     b       0x244044
 // CHECK-NOFIX:   220004:        bd 07 40 f9     ldr     x29, [x29, #8]
 // CHECK-NEXT:    220008:        c0 03 5f d6     ret
         .balign 4096
@@ -181,7 +181,7 @@ t3_ffc_ldur:
 // CHECK: <t3_ffc_sturh>:
 // CHECK-NEXT:    221ffc:        f2 01 00 f0     adrp    x18, #258048
 // CHECK-NEXT:    222000:        43 40 00 78     sturh   w3, [x2, #4]
-// CHECK-FIX:     222004:        12 88 00 14     b       #139336
+// CHECK-FIX:     222004:        12 88 00 14     b       0x24404c
 // CHECK-NOFIX:   222004:        41 0a 40 f9     ldr     x1, [x18, #16]
 // CHECK-NEXT:    222008:        c0 03 5f d6     ret
         .section .text.09, "ax", %progbits
@@ -198,8 +198,8 @@ t3_ffc_sturh:
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 223FF8 in unpatched output.
 // CHECK: <t3_ff8_literal>:
 // CHECK-NEXT:    223ff8:        f2 01 00 b0     adrp    x18, #249856
-// CHECK-NEXT:    223ffc:        e3 ff ff 58     ldr     x3, #-4
-// CHECK-FIX:     224000:        15 80 00 14     b       #131156
+// CHECK-NEXT:    223ffc:        e3 ff ff 58     ldr     x3, 0x223ff8
+// CHECK-FIX:     224000:        15 80 00 14     b       0x244054
 // CHECK-NOFIX:   224000:        52 0e 40 f9     ldr     x18, [x18, #24]
 // CHECK-NEXT:    224004:        c0 03 5f d6     ret
         .section .text.10, "ax", %progbits
@@ -217,7 +217,7 @@ t3_ff8_literal:
 // CHECK: <t3_ffc_register>:
 // CHECK-NEXT:    225ffc:        cf 01 00 f0     adrp    x15, #241664
 // CHECK-NEXT:    226000:        43 68 61 f8     ldr             x3, [x2, x1]
-// CHECK-FIX:     226004:        16 78 00 14     b       #122968
+// CHECK-FIX:     226004:        16 78 00 14     b       0x24405c
 // CHECK-NOFIX:   226004:        ea 11 40 f9     ldr     x10, [x15, #32]
 // CHECK-NEXT:    226008:        c0 03 5f d6     ret
         .section .text.11, "ax", %progbits
@@ -235,7 +235,7 @@ t3_ffc_register:
 // CHECK: <t3_ff8_stp>:
 // CHECK-NEXT:    227ff8:        d0 01 00 b0     adrp    x16, #233472
 // CHECK-NEXT:    227ffc:        61 08 00 a9     stp             x1, x2, [x3]
-// CHECK-FIX:     228000:        19 70 00 14     b       #114788
+// CHECK-FIX:     228000:        19 70 00 14     b       0x244064
 // CHECK-NOFIX:   228000:        0d 16 40 f9     ldr     x13, [x16, #40]
 // CHECK-NEXT:    228004:        c0 03 5f d6     ret
         .section .text.12, "ax", %progbits
@@ -253,7 +253,7 @@ t3_ff8_stp:
 // CHECK: <t3_ffc_stnp>:
 // CHECK-NEXT:    229ffc:        a7 01 00 f0     adrp    x7, #225280
 // CHECK-NEXT:    22a000:        61 08 00 a8     stnp            x1, x2, [x3]
-// CHECK-FIX:     22a004:        1a 68 00 14     b       #106600
+// CHECK-FIX:     22a004:        1a 68 00 14     b       0x24406c
 // CHECK-NOFIX:   22a004:        e9 0c 40 f9     ldr             x9, [x7, #24]
 // CHECK-NEXT:    22a008:        c0 03 5f d6     ret
         .section .text.13, "ax", %progbits
@@ -271,7 +271,7 @@ t3_ffc_stnp:
 // CHECK: <t3_ffc_st1singlepost>:
 // CHECK-NEXT:    22bffc:        b7 01 00 b0     adrp    x23, #217088
 // CHECK-NEXT:    22c000:        20 04 82 0d     st1 { v0.b }[1], [x1], x2
-// CHECK-FIX:     22c004:        1c 60 00 14     b       #98416
+// CHECK-FIX:     22c004:        1c 60 00 14     b       0x244074
 // CHECK-NOFIX:   22c004:        f6 12 40 f9     ldr     x22, [x23, #32]
 // CHECK-NEXT:    22c008:        c0 03 5f d6     ret
         .section .text.14, "ax", %progbits
@@ -289,7 +289,7 @@ t3_ffc_st1singlepost:
 // CHECK: <t3_ff8_st1multiple>:
 // CHECK-NEXT:    22dff8:        97 01 00 f0     adrp    x23, #208896
 // CHECK-NEXT:    22dffc:        20 a0 00 4c     st1     { v0.16b, v1.16b }, [x1]
-// CHECK-FIX:     22e000:        1f 58 00 14     b       #90236
+// CHECK-FIX:     22e000:        1f 58 00 14     b       0x24407c
 // CHECK-NOFIX:   22e000:        f8 16 40 f9     ldr     x24, [x23, #40]
 // CHECK-NEXT:    22e004:        c0 03 5f d6     ret
         .section .text.15, "ax", %progbits
@@ -308,7 +308,7 @@ t3_ff8_st1multiple:
 // CHECK-NEXT:    22fff8:        80 01 00 b0     adrp    x0, #200704
 // CHECK-NEXT:    22fffc:        21 00 40 f9     ldr             x1, [x1]
 // CHECK-NEXT:    230000:        42 00 00 8b     add             x2, x2, x0
-// CHECK-FIX:     230004:        20 50 00 14     b       #82048
+// CHECK-FIX:     230004:        20 50 00 14     b       0x244084
 // CHECK-NOFIX:   230004:        02 00 40 f9     ldr             x2, [x0]
 // CHECK-NEXT:    230008:        c0 03 5f d6     ret
         .section .text.16, "ax", %progbits
@@ -328,7 +328,7 @@ t4_ff8_ldr:
 // CHECK-NEXT:    231ffc:        7c 01 00 f0     adrp    x28, #192512
 // CHECK-NEXT:    232000:        42 00 00 f9     str             x2, [x2]
 // CHECK-NEXT:    232004:        20 00 02 cb     sub             x0, x1, x2
-// CHECK-FIX:     232008:        21 48 00 14     b       #73860
+// CHECK-FIX:     232008:        21 48 00 14     b       0x24408c
 // CHECK-NOFIX:   232008:        9b 07 00 f9     str     x27, [x28, #8]
 // CHECK-NEXT:    23200c:        c0 03 5f d6     ret
         .section .text.17, "ax", %progbits
@@ -348,7 +348,7 @@ t4_ffc_str:
 // CHECK-NEXT:    233ff8:        70 01 00 b0     adrp    x16, #184320
 // CHECK-NEXT:    233ffc:        61 08 00 a9     stp             x1, x2, [x3]
 // CHECK-NEXT:    234000:        03 7e 10 9b     mul             x3, x16, x16
-// CHECK-FIX:     234004:        24 40 00 14     b       #65680
+// CHECK-FIX:     234004:        24 40 00 14     b       0x244094
 // CHECK-NOFIX:   234004:        0e 0a 40 f9     ldr     x14, [x16, #16]
 // CHECK-NEXT:    234008:        c0 03 5f d6     ret
         .section .text.18, "ax", %progbits
@@ -368,7 +368,7 @@ t4_ff8_stp:
 // CHECK-NEXT:    235ff8:        50 01 00 f0     adrp    x16, #176128
 // CHECK-NEXT:    235ffc:        61 08 81 a9     stp     x1, x2, [x3, #16]!
 // CHECK-NEXT:    236000:        03 7e 10 9b     mul             x3, x16, x16
-// CHECK-FIX:     236004:        26 38 00 14     b       #57496
+// CHECK-FIX:     236004:        26 38 00 14     b       0x24409c
 // CHECK-NOFIX:   236004:        0e 06 40 f9     ldr     x14, [x16, #8]
 // CHECK-NEXT:    236008:        c0 03 5f d6     ret
         .section .text.19, "ax", %progbits
@@ -388,7 +388,7 @@ t4_ff8_stppre:
 // CHECK-NEXT:    237ff8:        50 01 00 b0     adrp    x16, #167936
 // CHECK-NEXT:    237ffc:        61 08 81 a8     stp     x1, x2, [x3], #16
 // CHECK-NEXT:    238000:        03 7e 10 9b     mul             x3, x16, x16
-// CHECK-FIX:     238004:        28 30 00 14     b       #49312
+// CHECK-FIX:     238004:        28 30 00 14     b       0x2440a4
 // CHECK-NOFIX:   238004:        0e 06 40 f9     ldr     x14, [x16, #8]
 // CHECK-NEXT:    238008:        c0 03 5f d6     ret
         .section .text.20, "ax", %progbits
@@ -408,7 +408,7 @@ t4_ff8_stppost:
 // CHECK-NEXT:    239ffc:        30 01 00 f0     adrp    x16, #159744
 // CHECK-NEXT:    23a000:        61 08 00 ad     stp             q1, q2, [x3]
 // CHECK-NEXT:    23a004:        03 7e 10 9b     mul             x3, x16, x16
-// CHECK-FIX:     23a008:        29 28 00 14     b       #41124
+// CHECK-FIX:     23a008:        29 28 00 14     b       0x2440ac
 // CHECK-NOFIX:   23a008:        0e 06 40 f9     ldr     x14, [x16, #8]
 // CHECK-NEXT:    23a00c:        c0 03 5f d6     ret
         .section .text.21, "ax", %progbits
@@ -428,7 +428,7 @@ t4_ffc_stpsimd:
 // CHECK-NEXT:    23bffc:        27 01 00 b0     adrp    x7, #151552
 // CHECK-NEXT:    23c000:        61 08 00 a8     stnp            x1, x2, [x3]
 // CHECK-NEXT:    23c004:        1f 20 03 d5     nop
-// CHECK-FIX:     23c008:        2b 20 00 14     b       #32940
+// CHECK-FIX:     23c008:        2b 20 00 14     b       0x2440b4
 // CHECK-NOFIX:   23c008:        ea 00 40 f9     ldr             x10, [x7]
 // CHECK-NEXT:    23c00c:        c0 03 5f d6     ret
         .section .text.22, "ax", %progbits
@@ -448,7 +448,7 @@ t4_ffc_stnp:
 // CHECK-NEXT:    23dffc:        18 01 00 f0     adrp    x24, #143360
 // CHECK-NEXT:    23e000:        20 80 00 4d     st1 { v0.s }[2], [x1]
 // CHECK-NEXT:    23e004:        f6 06 40 f9     ldr     x22, [x23, #8]
-// CHECK-FIX:     23e008:        2d 18 00 14     b       #24756
+// CHECK-FIX:     23e008:        2d 18 00 14     b       0x2440bc
 // CHECK-NOFIX:   23e008:        18 ff 3f f9     str     x24, [x24, #32760]
 // CHECK-NEXT:    23e00c:        c0 03 5f d6     ret
         .section .text.23, "ax", %progbits
@@ -467,7 +467,7 @@ t4_ffc_st1:
 // CHECK: <t3_ff8_ldr_once>:
 // CHECK-NEXT:    23fff8:        00 01 00 b0     adrp    x0, #135168
 // CHECK-NEXT:    23fffc:        20 70 82 4c     st1     { v0.16b }, [x1], x2
-// CHECK-FIX:     240000:        31 10 00 14     b       #16580
+// CHECK-FIX:     240000:        31 10 00 14     b       0x2440c4
 // CHECK-NOFIX:   240000:        01 08 40 f9     ldr     x1, [x0, #16]
 // CHECK-NEXT:    240004:        02 08 40 f9     ldr     x2, [x0, #16]
 // CHECK-NEXT:    240008:        c0 03 5f d6     ret
@@ -487,7 +487,7 @@ t3_ff8_ldr_once:
 // CHECK: <t3_ff8_ldxr>:
 // CHECK-NEXT:    241ff8:        e0 00 00 f0     adrp    x0, #126976
 // CHECK-NEXT:    241ffc:        03 7c 5f c8     ldxr    x3, [x0]
-// CHECK-FIX:     242000:        33 08 00 14     b       #8396
+// CHECK-FIX:     242000:        33 08 00 14     b       0x2440cc
 // CHECK-NOFIX:   242000:        01 08 40 f9     ldr     x1, [x0, #16]
 // CHECK:         242004:        02 08 40 f9     ldr     x2, [x0, #16]
 // CHECK-NEXT:    242008:        c0 03 5f d6     ret
@@ -507,7 +507,7 @@ t3_ff8_ldxr:
 // CHECK: <t3_ff8_stxr>:
 // CHECK-NEXT:    243ff8:        e0 00 00 b0     adrp    x0, #118784
 // CHECK-NEXT:    243ffc:        03 7c 04 c8     stxr    w4, x3, [x0]
-// CHECK-FIX:     244000:        35 00 00 14     b       #212
+// CHECK-FIX:     244000:        35 00 00 14     b       0x2440d4
 // CHECK-NOFIX:   244000:        01 08 40 f9     ldr     x1, [x0, #16]
 // CHECK:         244004:        02 08 40 f9     ldr     x2, [x0, #16]
 // CHECK-NEXT:    244008:        c0 03 5f d6     ret
@@ -531,82 +531,82 @@ _start:
 
 // CHECK-FIX: <__CortexA53843419_212000>:
 // CHECK-FIX-NEXT:    24400c:    00 00 40 f9     ldr     x0, [x0]
-// CHECK-FIX-NEXT:    244010:    fd 37 ff 17     b       #-204812
+// CHECK-FIX-NEXT:    244010:    fd 37 ff 17     b       0x212004
 // CHECK-FIX: <__CortexA53843419_214000>:
 // CHECK-FIX-NEXT:    244014:    02 04 40 f9     ldr     x2, [x0, #8]
-// CHECK-FIX-NEXT:    244018:    fb 3f ff 17     b       #-196628
+// CHECK-FIX-NEXT:    244018:    fb 3f ff 17     b       0x214004
 // CHECK-FIX: <__CortexA53843419_216004>:
 // CHECK-FIX-NEXT:    24401c:    03 08 40 f9     ldr     x3, [x0, #16]
-// CHECK-FIX-NEXT:    244020:    fa 47 ff 17     b       #-188440
+// CHECK-FIX-NEXT:    244020:    fa 47 ff 17     b       0x216008
 // CHECK-FIX: <__CortexA53843419_218000>:
 // CHECK-FIX-NEXT:    244024:    02 0c 40 f9     ldr     x2, [x0, #24]
-// CHECK-FIX-NEXT:    244028:    f7 4f ff 17     b       #-180260
+// CHECK-FIX-NEXT:    244028:    f7 4f ff 17     b       0x218004
 // CHECK-FIX: <__CortexA53843419_21A004>:
 // CHECK-FIX-NEXT:    24402c:    9c 13 00 f9     str     x28, [x28, #32]
-// CHECK-FIX-NEXT:    244030:    f6 57 ff 17     b       #-172072
+// CHECK-FIX-NEXT:    244030:    f6 57 ff 17     b       0x21a008
 // CHECK-FIX: <__CortexA53843419_21C004>:
 // CHECK-FIX-NEXT:    244034:    84 17 00 f9     str     x4, [x28, #40]
-// CHECK-FIX-NEXT:    244038:    f4 5f ff 17     b       #-163888
+// CHECK-FIX-NEXT:    244038:    f4 5f ff 17     b       0x21c008
 // CHECK-FIX: <__CortexA53843419_21E000>:
 // CHECK-FIX-NEXT:    24403c:    bd 03 40 f9     ldr     x29, [x29]
-// CHECK-FIX-NEXT:    244040:    f1 67 ff 17     b       #-155708
+// CHECK-FIX-NEXT:    244040:    f1 67 ff 17     b       0x21e004
 // CHECK-FIX: <__CortexA53843419_220004>:
 // CHECK-FIX-NEXT:    244044:    bd 07 40 f9     ldr     x29, [x29, #8]
-// CHECK-FIX-NEXT:    244048:    f0 6f ff 17     b       #-147520
+// CHECK-FIX-NEXT:    244048:    f0 6f ff 17     b       0x220008
 // CHECK-FIX: <__CortexA53843419_222004>:
 // CHECK-FIX-NEXT:    24404c:    41 0a 40 f9     ldr     x1, [x18, #16]
-// CHECK-FIX-NEXT:    244050:    ee 77 ff 17     b       #-139336
+// CHECK-FIX-NEXT:    244050:    ee 77 ff 17     b       0x222008
 // CHECK-FIX: <__CortexA53843419_224000>:
 // CHECK-FIX-NEXT:    244054:    52 0e 40 f9     ldr     x18, [x18, #24]
-// CHECK-FIX-NEXT:    244058:    eb 7f ff 17     b       #-131156
+// CHECK-FIX-NEXT:    244058:    eb 7f ff 17     b       0x224004
 // CHECK-FIX: <__CortexA53843419_226004>:
 // CHECK-FIX-NEXT:    24405c:    ea 11 40 f9     ldr     x10, [x15, #32]
-// CHECK-FIX-NEXT:    244060:    ea 87 ff 17     b       #-122968
+// CHECK-FIX-NEXT:    244060:    ea 87 ff 17     b       0x226008
 // CHECK-FIX: <__CortexA53843419_228000>:
 // CHECK-FIX-NEXT:    244064:    0d 16 40 f9     ldr     x13, [x16, #40]
-// CHECK-FIX-NEXT:    244068:    e7 8f ff 17     b       #-114788
+// CHECK-FIX-NEXT:    244068:    e7 8f ff 17     b       0x228004
 // CHECK-FIX: <__CortexA53843419_22A004>:
 // CHECK-FIX-NEXT:    24406c:    e9 0c 40 f9     ldr     x9, [x7, #24]
-// CHECK-FIX-NEXT:    244070:    e6 97 ff 17     b       #-106600
+// CHECK-FIX-NEXT:    244070:    e6 97 ff 17     b       0x22a008
 // CHECK-FIX: <__CortexA53843419_22C004>:
 // CHECK-FIX-NEXT:    244074:    f6 12 40 f9     ldr     x22, [x23, #32]
-// CHECK-FIX-NEXT:    244078:    e4 9f ff 17     b       #-98416
+// CHECK-FIX-NEXT:    244078:    e4 9f ff 17     b       0x22c008
 // CHECK-FIX: <__CortexA53843419_22E000>:
 // CHECK-FIX-NEXT:    24407c:    f8 16 40 f9     ldr     x24, [x23, #40]
-// CHECK-FIX-NEXT:    244080:    e1 a7 ff 17     b       #-90236
+// CHECK-FIX-NEXT:    244080:    e1 a7 ff 17     b       0x22e004
 // CHECK-FIX: <__CortexA53843419_230004>:
 // CHECK-FIX-NEXT:    244084:    02 00 40 f9     ldr     x2, [x0]
-// CHECK-FIX-NEXT:    244088:    e0 af ff 17     b       #-82048
+// CHECK-FIX-NEXT:    244088:    e0 af ff 17     b       0x230008
 // CHECK-FIX: <__CortexA53843419_232008>:
 // CHECK-FIX-NEXT:    24408c:    9b 07 00 f9     str     x27, [x28, #8]
-// CHECK-FIX-NEXT:    244090:    df b7 ff 17     b       #-73860
+// CHECK-FIX-NEXT:    244090:    df b7 ff 17     b       0x23200c
 // CHECK-FIX: <__CortexA53843419_234004>:
 // CHECK-FIX-NEXT:    244094:    0e 0a 40 f9     ldr     x14, [x16, #16]
-// CHECK-FIX-NEXT:    244098:    dc bf ff 17     b       #-65680
+// CHECK-FIX-NEXT:    244098:    dc bf ff 17     b       0x234008
 // CHECK-FIX: <__CortexA53843419_236004>:
 // CHECK-FIX-NEXT:    24409c:    0e 06 40 f9     ldr     x14, [x16, #8]
-// CHECK-FIX-NEXT:    2440a0:    da c7 ff 17     b       #-57496
+// CHECK-FIX-NEXT:    2440a0:    da c7 ff 17     b       0x236008
 // CHECK-FIX: <__CortexA53843419_238004>:
 // CHECK-FIX-NEXT:    2440a4:    0e 06 40 f9     ldr     x14, [x16, #8]
-// CHECK-FIX-NEXT:    2440a8:    d8 cf ff 17     b       #-49312
+// CHECK-FIX-NEXT:    2440a8:    d8 cf ff 17     b       0x238008
 // CHECK-FIX: <__CortexA53843419_23A008>:
 // CHECK-FIX-NEXT:    2440ac:    0e 06 40 f9     ldr     x14, [x16, #8]
-// CHECK-FIX-NEXT:    2440b0:    d7 d7 ff 17     b       #-41124
+// CHECK-FIX-NEXT:    2440b0:    d7 d7 ff 17     b       0x23a00c
 // CHECK-FIX: <__CortexA53843419_23C008>:
 // CHECK-FIX-NEXT:    2440b4:    ea 00 40 f9     ldr     x10, [x7]
-// CHECK-FIX-NEXT:    2440b8:    d5 df ff 17     b       #-32940
+// CHECK-FIX-NEXT:    2440b8:    d5 df ff 17     b       0x23c00c
 // CHECK-FIX: <__CortexA53843419_23E008>:
 // CHECK-FIX-NEXT:    2440bc:    18 ff 3f f9     str     x24, [x24, #32760]
-// CHECK-FIX-NEXT:    2440c0:    d3 e7 ff 17     b       #-24756
+// CHECK-FIX-NEXT:    2440c0:    d3 e7 ff 17     b       0x23e00c
 // CHECK-FIX: <__CortexA53843419_240000>:
 // CHECK-FIX-NEXT:    2440c4:    01 08 40 f9     ldr     x1, [x0, #16]
-// CHECK-FIX-NEXT:    2440c8:    cf ef ff 17     b       #-16580
+// CHECK-FIX-NEXT:    2440c8:    cf ef ff 17     b       0x240004
 // CHECK-FIX: <__CortexA53843419_242000>:
 // CHECK-FIX-NEXT:    2440cc:    01 08 40 f9     ldr     x1, [x0, #16]
-// CHECK-FIX-NEXT:    2440d0:    cd f7 ff 17     b       #-8396
+// CHECK-FIX-NEXT:    2440d0:    cd f7 ff 17     b       0x242004
 // CHECK-FIX: <__CortexA53843419_244000>:
 // CHECK-FIX-NEXT:    2440d4:    01 08 40 f9     ldr     x1, [x0, #16]
-// CHECK-FIX-NEXT:    2440d8:    cb ff ff 17     b       #-212
+// CHECK-FIX-NEXT:    2440d8:    cb ff ff 17     b       0x244004
         .data
         .globl dat
         .globl dat2

diff  --git a/lld/test/ELF/aarch64-cortex-a53-843419-thunk.s b/lld/test/ELF/aarch64-cortex-a53-843419-thunk.s
index 5510dde28555..998175e39719 100644
--- a/lld/test/ELF/aarch64-cortex-a53-843419-thunk.s
+++ b/lld/test/ELF/aarch64-cortex-a53-843419-thunk.s
@@ -41,11 +41,11 @@ t3_ff8_ldr:
 // CHECK: 0000000000010ff8 <t3_ff8_ldr>:
 // CHECK-NEXT: adrp    x0, #134217728
 // CHECK-NEXT: ldr     x1, [x1]
-// CHECK-NEXT: b       #8
+// CHECK-NEXT: b       0x11008
 // CHECK-NEXT: ret
 // CHECK: 0000000000011008 <__CortexA53843419_11000>:
 // CHECK-NEXT: ldr     x0, [x0, #8]
-// CHECK-NEXT: b       #-8
+// CHECK-NEXT: b       0x11004
         .section .text.04, "ax", %progbits
         .globl far_away
         .type far_away, function

diff  --git a/lld/test/ELF/aarch64-feature-bti.s b/lld/test/ELF/aarch64-feature-bti.s
index b37527924d13..4c24061462f7 100644
--- a/lld/test/ELF/aarch64-feature-bti.s
+++ b/lld/test/ELF/aarch64-feature-bti.s
@@ -17,7 +17,7 @@
 # NOBTIDYN-NOT:   0x0000000070000003 (AARCH64_PAC_PLT)
 
 # NOBTI: 00000000000102b8 <func2>:
-# NOBTI-NEXT:    102b8: bl      #56 <func3 at plt>
+# NOBTI-NEXT:    102b8: bl      0x102f0 <func3 at plt>
 # NOBTI-NEXT:    102bc: ret
 # NOBTI: Disassembly of section .plt:
 # NOBTI: 00000000000102d0 <.plt>:
@@ -56,7 +56,7 @@
 # BTIDYN-NOT:  0x0000000070000003 (AARCH64_PAC_PLT)
 
 # BTISO: 0000000000010348 <func2>:
-# BTISO-NEXT:    10348: bl      #56 <func3 at plt>
+# BTISO-NEXT:    10348: bl      0x10380 <func3 at plt>
 # BTISO-NEXT:           ret
 # BTISO: 0000000000010350 <func3>:
 # BTISO-NEXT:    10350: ret
@@ -92,7 +92,7 @@
 
 # EXECBTI: Disassembly of section .text:
 # EXECBTI: 0000000000210348 <func1>:
-# EXECBTI-NEXT:   210348: bl    #40 <func2 at plt>
+# EXECBTI-NEXT:   210348: bl    0x210370 <func2 at plt>
 # EXECBTI-NEXT:           ret
 # EXECBTI: Disassembly of section .plt:
 # EXECBTI: 0000000000210350 <.plt>:
@@ -120,7 +120,7 @@
 
 # PIE: Disassembly of section .text:
 # PIE: 0000000000010348 <func1>:
-# PIE-NEXT:    10348: bl     #40 <func2 at plt>
+# PIE-NEXT:    10348: bl     0x10370 <func2 at plt>
 # PIE-NEXT:           ret
 # PIE: Disassembly of section .plt:
 # PIE: 0000000000010350 <.plt>:
@@ -149,7 +149,7 @@
 
 # NOEX: Disassembly of section .text:
 # NOEX: 00000000002102e0 <func1>:
-# NOEX-NEXT:   2102e0: bl      #48 <func2 at plt>
+# NOEX-NEXT:   2102e0: bl      0x210310 <func2 at plt>
 # NOEX-NEXT:           ret
 # NOEX: 00000000002102e8 <func3>:
 # NOEX-NEXT:   2102e8: ret
@@ -183,7 +183,7 @@
 
 # FORCE: Disassembly of section .text:
 # FORCE: 0000000000210370 <func1>:
-# FORCE-NEXT:   210370: bl      #48 <func2 at plt>
+# FORCE-NEXT:   210370: bl      0x2103a0 <func2 at plt>
 # FORCE-NEXT:           ret
 # FORCE: 0000000000210378 <func3>:
 # FORCE-NEXT:   210378: ret

diff  --git a/lld/test/ELF/aarch64-feature-btipac.s b/lld/test/ELF/aarch64-feature-btipac.s
index da08b6601007..e5d8abeaaf28 100644
--- a/lld/test/ELF/aarch64-feature-btipac.s
+++ b/lld/test/ELF/aarch64-feature-btipac.s
@@ -16,7 +16,7 @@
 
 # BTIPACSO: Disassembly of section .text:
 # BTIPACSO: 0000000000010348 <func2>:
-# BTIPACSO-NEXT:    10348:              bl      #56 <func3 at plt>
+# BTIPACSO-NEXT:    10348:              bl      0x10380 <func3 at plt>
 # BTIPACSO-NEXT:                        ret
 # BTIPACSO: 0000000000010350 <func3>:
 # BTIPACSO-NEXT:    10350:              ret
@@ -52,7 +52,7 @@
 
 # BTIPACEX: Disassembly of section .text:
 # BTIPACEX: 0000000000210370 <func1>:
-# BTIPACEX-NEXT:   210370:              bl      #48 <func2 at plt>
+# BTIPACEX-NEXT:   210370:              bl      0x2103a0 <func2 at plt>
 # BTIPACEX-NEXT:                        ret
 # BTIPACEX-NEXT:                        ret
 # BTIPACEX: 000000000021037c <func3>:
@@ -85,7 +85,7 @@
 
 # EX: Disassembly of section .text:
 # EX: 00000000002102e0 <func1>:
-# EX-NEXT:   2102e0: bl      #48 <func2 at plt>
+# EX-NEXT:   2102e0: bl      0x210310 <func2 at plt>
 # EX-NEXT:           ret
 # EX-NEXT:           ret
 # EX: 00000000002102ec <func3>:
@@ -146,7 +146,7 @@ func1:
 
 # BTIPACEX2: Disassembly of section .text:
 # BTIPACEX2: 0000000000210370 <func1>:
-# BTIPACEX2-NEXT:   210370:              bl      #48 <func2 at plt>
+# BTIPACEX2-NEXT:   210370:              bl      0x2103a0 <func2 at plt>
 # BTIPACEX2-NEXT:                        ret
 # BTIPACEX2-NEXT:                        ret
 # BTIPACEX2: 000000000021037c <func3>:

diff  --git a/lld/test/ELF/aarch64-feature-pac.s b/lld/test/ELF/aarch64-feature-pac.s
index b71428d57eb4..8b5182f53ee5 100644
--- a/lld/test/ELF/aarch64-feature-pac.s
+++ b/lld/test/ELF/aarch64-feature-pac.s
@@ -14,7 +14,7 @@
 # RUN: llvm-readelf --dynamic-table %tno.so | FileCheck --check-prefix NOPACDYN %s
 
 # NOPAC: 00000000000102b8 <func2>:
-# NOPAC-NEXT:    102b8: bl      #56 <func3 at plt>
+# NOPAC-NEXT:    102b8: bl      0x102f0 <func3 at plt>
 # NOPAC-NEXT:           ret
 # NOPAC: Disassembly of section .plt:
 # NOPAC: 00000000000102d0 <.plt>:
@@ -47,7 +47,7 @@
 
 ## PAC has no effect on PLT[0], for PLT[N].
 # PACSO: 0000000000010348 <func2>:
-# PACSO-NEXT:    10348:         bl      #56 <func3 at plt>
+# PACSO-NEXT:    10348:         bl      0x10380 <func3 at plt>
 # PACSO-NEXT:                   ret
 # PACSO: 0000000000010350 <func3>:
 # PACSO-NEXT:    10350:         ret
@@ -88,7 +88,7 @@
 
 # PACPLT: Disassembly of section .text:
 # PACPLT: 0000000000210370 <func1>:
-# PACPLT-NEXT:   210370:        bl      #48 <func2 at plt>
+# PACPLT-NEXT:   210370:        bl      0x2103a0 <func2 at plt>
 # PACPLT-NEXT:                  ret
 # PACPLT: 0000000000210378 <func3>:
 # PACPLT-NEXT:   210378:        ret

diff  --git a/lld/test/ELF/aarch64-gnu-ifunc-plt.s b/lld/test/ELF/aarch64-gnu-ifunc-plt.s
index f65183fa02e7..a74965a7b364 100644
--- a/lld/test/ELF/aarch64-gnu-ifunc-plt.s
+++ b/lld/test/ELF/aarch64-gnu-ifunc-plt.s
@@ -39,10 +39,10 @@
 // DISASM:      <bar>:
 // DISASM-NEXT:    2102dc: ret
 // DISASM:      <_start>:
-// DISASM-NEXT:    2102e0: bl      #80 <zed2+0x210330>
-// DISASM-NEXT:    2102e4: bl      #92 <zed2+0x210340>
-// DISASM-NEXT:    2102e8: bl      #40 <bar2 at plt>
-// DISASM-NEXT:    2102ec: bl      #52 <zed2 at plt>
+// DISASM-NEXT:    2102e0: bl      0x210330 <zed2+0x210330>
+// DISASM-NEXT:    2102e4: bl      0x210340 <zed2+0x210340>
+// DISASM-NEXT:    2102e8: bl      0x210310 <bar2 at plt>
+// DISASM-NEXT:    2102ec: bl      0x210320 <zed2 at plt>
 // DISASM-EMPTY:
 // DISASM-NEXT: Disassembly of section .plt:
 // DISASM-EMPTY:

diff  --git a/lld/test/ELF/aarch64-gnu-ifunc.s b/lld/test/ELF/aarch64-gnu-ifunc.s
index d38feca96b42..daa7873eb71d 100644
--- a/lld/test/ELF/aarch64-gnu-ifunc.s
+++ b/lld/test/ELF/aarch64-gnu-ifunc.s
@@ -106,8 +106,8 @@
 // DISASM: <bar>:
 // DISASM-NEXT:  21018c: ret
 // DISASM:      <_start>:
-// DISASM-NEXT:  210190: bl  #16
-// DISASM-NEXT:  210194: bl  #28
+// DISASM-NEXT:  210190: bl  0x2101a0
+// DISASM-NEXT:  210194: bl  0x2101b0
 // DISASM-NEXT:  210198: add x2, x2, #344
 // DISASM-NEXT:  21019c: add x2, x2, #392
 // DISASM-EMPTY:

diff  --git a/lld/test/ELF/aarch64-jump26-thunk.s b/lld/test/ELF/aarch64-jump26-thunk.s
index 6fe05893332b..dbb79923ccd5 100644
--- a/lld/test/ELF/aarch64-jump26-thunk.s
+++ b/lld/test/ELF/aarch64-jump26-thunk.s
@@ -12,9 +12,9 @@ _start:
 // CHECK: Disassembly of section .text:
 // CHECK-EMPTY:
 // CHECK-NEXT: <_start>:
-// CHECK-NEXT:    210120:       b       #4
+// CHECK-NEXT:    210120:       b       0x210124
 // CHECK: <__AArch64AbsLongThunk_big>:
-// CHECK-NEXT:    210124:       ldr     x16, #8
+// CHECK-NEXT:    210124:       ldr     x16, 0x21012c
 // CHECK-NEXT:    210128:       br      x16
 // CHECK: <$d>:
 // CHECK-NEXT:    21012c:       00 00 00 00     .word   0x00000000

diff  --git a/lld/test/ELF/aarch64-plt.s b/lld/test/ELF/aarch64-plt.s
index 50a65497fb45..a049fbef6eb5 100644
--- a/lld/test/ELF/aarch64-plt.s
+++ b/lld/test/ELF/aarch64-plt.s
@@ -59,9 +59,9 @@
 // DUMPDSO-NEXT: 30470 40030100 00000000 40030100 00000000
 
 // DISASMDSO: <_start>:
-// DISASMDSO-NEXT:     10330: b       #0x30 <foo at plt>
-// DISASMDSO-NEXT:     10334: b       #0x3c <bar at plt>
-// DISASMDSO-NEXT:     10338: b       #0x48 <weak at plt>
+// DISASMDSO-NEXT:     10330: b       0x10360 <foo at plt>
+// DISASMDSO-NEXT:     10334: b       0x10370 <bar at plt>
+// DISASMDSO-NEXT:     10338: b       0x10380 <weak at plt>
 
 // DISASMDSO: <foo>:
 // DISASMDSO-NEXT:     1033c: nop
@@ -151,9 +151,9 @@
 // DUMPEXE-NEXT:  230410 e0022100 00000000
 
 // DISASMEXE: <_start>:
-// DISASMEXE-NEXT:    2102c8: b #0xc <foo>
-// DISASMEXE-NEXT:    2102cc: b #0x34 <bar at plt>
-// DISASMEXE-NEXT:    2102d0: b #0x40 <weak at plt>
+// DISASMEXE-NEXT:    2102c8: b 0x2102d4 <foo>
+// DISASMEXE-NEXT:    2102cc: b 0x210300 <bar at plt>
+// DISASMEXE-NEXT:    2102d0: b 0x210310 <weak at plt>
 
 // DISASMEXE: <foo>:
 // DISASMEXE-NEXT:    2102d4: nop

diff  --git a/lld/test/ELF/aarch64-relocs.s b/lld/test/ELF/aarch64-relocs.s
index 4a99804669fc..9025a2413237 100644
--- a/lld/test/ELF/aarch64-relocs.s
+++ b/lld/test/ELF/aarch64-relocs.s
@@ -83,7 +83,7 @@ call26:
 # CHECK: Disassembly of section .R_AARCH64_CALL26:
 # CHECK-EMPTY:
 # CHECK-NEXT: <call26>:
-# CHECK-NEXT:   210154:       ff ff ff 97     bl     #-4
+# CHECK-NEXT:   210154:       ff ff ff 97     bl     0x210150
 
 .section .R_AARCH64_JUMP26,"ax", at progbits
 jump26:
@@ -96,7 +96,7 @@ jump26:
 # CHECK: Disassembly of section .R_AARCH64_JUMP26:
 # CHECK-EMPTY:
 # CHECK-NEXT: <jump26>:
-# CHECK-NEXT:   210158:       fe ff ff 17     b      #-8
+# CHECK-NEXT:   210158:       fe ff ff 17     b      0x210150
 
 .section .R_AARCH64_LDST32_ABS_LO12_NC,"ax", at progbits
 ldst32:

diff  --git a/lld/test/ELF/aarch64-thunk-pi.s b/lld/test/ELF/aarch64-thunk-pi.s
index 46d5075d2d43..7586344c75c4 100644
--- a/lld/test/ELF/aarch64-thunk-pi.s
+++ b/lld/test/ELF/aarch64-thunk-pi.s
@@ -16,7 +16,7 @@ low_target:
  bl high_target
  ret
 // CHECK: <low_target>:
-// CHECK-NEXT:       d8:       bl      #0x14 <__AArch64ADRPThunk_high_target>
+// CHECK-NEXT:       d8:       bl      0xec <__AArch64ADRPThunk_high_target>
 // CHECK-NEXT:                 ret
 
  .hidden low_target2
@@ -29,8 +29,8 @@ low_target2:
  bl .text_high+8
  ret
 // CHECK: <low_target2>:
-// CHECK-NEXT:       e0:       bl      #0x18 <__AArch64ADRPThunk_high_target2>
-// CHECK-NEXT:       e4:       bl      #0x20 <__AArch64ADRPThunk_>
+// CHECK-NEXT:       e0:       bl      0xf8 <__AArch64ADRPThunk_high_target2>
+// CHECK-NEXT:       e4:       bl      0x104 <__AArch64ADRPThunk_>
 // CHECK-NEXT:                 ret
 
 // Expect range extension thunks for .text_low
@@ -58,7 +58,7 @@ high_target:
  bl low_target
  ret
 // CHECK: <high_target>:
-// CHECK-NEXT: 10000000:       bl #0x50 <low_target at plt>
+// CHECK-NEXT: 10000000:       bl 0x10000050 <low_target at plt>
 // CHECK-NEXT:                 ret
 
  .hidden high_target2
@@ -69,7 +69,7 @@ high_target2:
  bl low_target2
  ret
 // CHECK: <high_target2>:
-// CHECK-NEXT: 10000008:       bl      #0x8 <__AArch64ADRPThunk_low_target2>
+// CHECK-NEXT: 10000008:       bl      0x10000010 <__AArch64ADRPThunk_low_target2>
 // CHECK-NEXT:                 ret
 
 // Expect Thunk for .text.high

diff  --git a/lld/test/ELF/aarch64-thunk-script.s b/lld/test/ELF/aarch64-thunk-script.s
index 02bf115ce9a5..b1a7aab18e1e 100644
--- a/lld/test/ELF/aarch64-thunk-script.s
+++ b/lld/test/ELF/aarch64-thunk-script.s
@@ -31,17 +31,17 @@ high_target:
 // CHECK: Disassembly of section .text_low:
 // CHECK-EMPTY:
 // CHECK-NEXT: <_start>:
-// CHECK-NEXT:     2000:       bl      #0xc <__AArch64AbsLongThunk_high_target>
-// CHECK-NEXT:     2004:       bl      #0x18 <__AArch64AbsLongThunk_>
+// CHECK-NEXT:     2000:       bl      0x200c <__AArch64AbsLongThunk_high_target>
+// CHECK-NEXT:     2004:       bl      0x201c <__AArch64AbsLongThunk_>
 // CHECK-NEXT:                 ret
 // CHECK: <__AArch64AbsLongThunk_high_target>:
-// CHECK-NEXT:     200c:       ldr     x16, #0x8
+// CHECK-NEXT:     200c:       ldr     x16, 0x2014
 // CHECK-NEXT:                 br      x16
 // CHECK: <$d>:
 // CHECK-NEXT:     2014:       00 20 00 08     .word   0x08002000
 // CHECK-NEXT:     2018:       00 00 00 00     .word   0x00000000
 // CHECK:      <__AArch64AbsLongThunk_>:
-// CHECK-NEXT:     201c:       ldr x16, #0x8
+// CHECK-NEXT:     201c:       ldr x16, 0x2024
 // CHECK-NEXT:     2020:       br x16
 // CHECK:      <$d>:
 // CHECK-NEXT:     2024:       04 20 00 08     .word   0x08002004
@@ -49,7 +49,7 @@ high_target:
 // CHECK: Disassembly of section .text_high:
 // CHECK-EMPTY:
 // CHECK-NEXT: <high_target>:
-// CHECK-NEXT:  8002000:       bl      #-0x8000000 <_start>
+// CHECK-NEXT:  8002000:       bl      0x2000 <_start>
 // CHECK-NEXT:                 ret
 
 /// Local symbols copied from %t.o

diff  --git a/lld/test/ELF/aarch64-thunk-section-location.s b/lld/test/ELF/aarch64-thunk-section-location.s
index 11963e705c6c..1579f609e32d 100644
--- a/lld/test/ELF/aarch64-thunk-section-location.s
+++ b/lld/test/ELF/aarch64-thunk-section-location.s
@@ -35,7 +35,7 @@ high_target:
  ret
 
 // CHECK: <__AArch64AbsLongThunk_high_target>:
-// CHECK-NEXT:  81d1008:       ldr     x16, #8
+// CHECK-NEXT:  81d1008:       ldr     x16, 0x81d1010
 // CHECK-NEXT:  81d100c:       br      x16
 // CHECK: <$d>:
 // CHECK-NEXT:  81d1010:       00 20 21 08     .word   0x08212000

diff  --git a/lld/test/ELF/aarch64-tstbr14-reloc.s b/lld/test/ELF/aarch64-tstbr14-reloc.s
index dd946ebda52c..a6fc4f9f0d0f 100644
--- a/lld/test/ELF/aarch64-tstbr14-reloc.s
+++ b/lld/test/ELF/aarch64-tstbr14-reloc.s
@@ -17,10 +17,10 @@
 # CHECK-NEXT:  210134: nop
 # CHECK-NEXT:  210138: nop
 # CHECK:      <_start>:
-# CHECK-NEXT:  21013c: tbnz w3, #15, #-28 <_foo>
-# CHECK-NEXT:  210140: tbnz w3, #15, #-16 <_bar>
-# CHECK-NEXT:  210144: tbz x6, #45, #-36 <_foo>
-# CHECK-NEXT:  210148: tbz x6, #45, #-24 <_bar>
+# CHECK-NEXT:  21013c: tbnz w3, #15, 0x210120 <_foo>
+# CHECK-NEXT:  210140: tbnz w3, #15, 0x210130 <_bar>
+# CHECK-NEXT:  210144: tbz x6, #45, 0x210120 <_foo>
+# CHECK-NEXT:  210148: tbz x6, #45, 0x210130 <_bar>
 
 #DSOREL:      Section {
 #DSOREL:        Index:
@@ -57,10 +57,10 @@
 #DSO-NEXT:  1030c: nop
 #DSO-NEXT:  10310: nop
 #DSO:      <_start>:
-#DSO-NEXT:  10314: tbnz w3, #15, #60 <_foo at plt>
-#DSO-NEXT:  10318: tbnz w3, #15, #72 <_bar at plt>
-#DSO-NEXT:  1031c: tbz x6, #45, #52 <_foo at plt>
-#DSO-NEXT:  10320: tbz x6, #45, #64 <_bar at plt>
+#DSO-NEXT:  10314: tbnz w3, #15, 0x10350 <_foo at plt>
+#DSO-NEXT:  10318: tbnz w3, #15, 0x10360 <_bar at plt>
+#DSO-NEXT:  1031c: tbz x6, #45, 0x10350 <_foo at plt>
+#DSO-NEXT:  10320: tbz x6, #45, 0x10360 <_bar at plt>
 #DSO-EMPTY:
 #DSO-NEXT: Disassembly of section .plt:
 #DSO-EMPTY:

diff  --git a/lld/test/ELF/aarch64-undefined-weak.s b/lld/test/ELF/aarch64-undefined-weak.s
index 3261daf5892a..839dd8d14d61 100644
--- a/lld/test/ELF/aarch64-undefined-weak.s
+++ b/lld/test/ELF/aarch64-undefined-weak.s
@@ -37,13 +37,13 @@ _start:
 // CHECK: Disassembly of section .text:
 // CHECK-EMPTY:
 // CHECK-NEXT: 0000000010010120 <_start>:
-// CHECK-NEXT: 10010120: b       #4
-// CHECK-NEXT: 10010124: bl      #4
-// CHECK-NEXT: 10010128: b.eq    #4
-// CHECK-NEXT: 1001012c: cbz     x1, #4
+// CHECK-NEXT: 10010120: b       0x10010124
+// CHECK-NEXT: 10010124: bl      0x10010128
+// CHECK-NEXT: 10010128: b.eq    0x1001012c
+// CHECK-NEXT: 1001012c: cbz     x1, 0x10010130
 // CHECK-NEXT: 10010130: adr     x0, #0
 // CHECK-NEXT: 10010134: adrp    x0, #0
-// CHECK-NEXT: 10010138: ldr     x8, #0
+// CHECK-NEXT: 10010138: ldr     x8, 0x10010138
 // CHECK:      1001013c: 00 00 00 00     .word   0x00000000
 // CHECK-NEXT: 10010140: 00 00 00 00     .word   0x00000000
 // CHECK-NEXT: 10010144: 00 00 00 00     .word   0x00000000

diff  --git a/lld/test/ELF/pr34660.s b/lld/test/ELF/pr34660.s
index 054ec27bdc73..7470d2c2d9d3 100644
--- a/lld/test/ELF/pr34660.s
+++ b/lld/test/ELF/pr34660.s
@@ -15,7 +15,7 @@
 # DISASM: Disassembly of section .text:
 # DISASM-EMPTY:
 # DISASM-NEXT: <$x.0>:
-# DISASM-NEXT:   1022c:       ldr     x8, #131176
+# DISASM-NEXT:   1022c:       ldr     x8, 0x30294
 
 # SYM: Symbol table '.symtab'
 # SYM:  0000000000030294     0 NOTYPE  LOCAL  DEFAULT    6 patatino

diff  --git a/lld/test/ELF/relocation-b-aarch64.test b/lld/test/ELF/relocation-b-aarch64.test
index 012bf4540338..8190730a9f30 100644
--- a/lld/test/ELF/relocation-b-aarch64.test
+++ b/lld/test/ELF/relocation-b-aarch64.test
@@ -10,9 +10,9 @@
 # CHECK: Disassembly of section .text:
 # CHECK-EMPTY:
 # CHECK-NEXT: <foo>:
-# CHECK-NEXT:    210120:       b       #4
+# CHECK-NEXT:    210120:       b       0x210124
 # CHECK: <bar>:
-# CHECK-NEXT:    210124:       b       #-4
+# CHECK-NEXT:    210124:       b       0x210120
 
 !ELF
 FileHeader:

diff  --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
index c64a40abb768..4f568f86b7f9 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
@@ -1356,7 +1356,11 @@ void AArch64InstPrinter::printAlignedLabel(const MCInst *MI, uint64_t Address,
   // If the label has already been resolved to an immediate offset (say, when
   // we're running the disassembler), just print the immediate.
   if (Op.isImm()) {
-    O << "#" << formatImm(Op.getImm() * 4);
+    int64_t Offset = Op.getImm() * 4;
+    if (PrintBranchImmAsAddress)
+      O << formatHex(Address + Offset);
+    else
+      O << "#" << formatImm(Offset);
     return;
   }
 

diff  --git a/llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll b/llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll
index c3395033c7fd..91ea4edf489b 100644
--- a/llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll
+++ b/llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll
@@ -9,9 +9,9 @@
 ; CHECK-LABEL: <test1>:
 ; CHECK-LABEL: <$d.1>:
 ; CHECK-LABEL: <$x.2>:
-; CHECK-NEXT:    b #16 <$x.4+0x4>
+; CHECK-NEXT:    b 0x30 <$x.4+0x4>
 ; CHECK-LABEL: <$x.4>:
-; CHECK-NEXT:    b #4 <$x.4+0x4>
+; CHECK-NEXT:    b 0x30 <$x.4+0x4>
 ; CHECK-NEXT:    mov w0, wzr
 ; CHECK-NEXT:    ldr x30, [sp], #16
 ; CHECK-NEXT:    ret
@@ -41,10 +41,10 @@ declare dso_local i32 @g(...) local_unnamed_addr
 declare dso_local i32 @i(...) local_unnamed_addr
 
 ; CHECK-LABEL: <test2>:
-; CHECK:         bl #0 <test2+0x18>
+; CHECK:         bl {{.*}} <test2+0x18>
 ; CHECK-LABEL: <$d.5>:
 ; CHECK-LABEL: <$x.6>:
-; CHECK-NEXT:    b #-20 <test2+0x18>
+; CHECK-NEXT:    b {{.*}} <test2+0x18>
 define hidden i32 @test2() local_unnamed_addr {
   %1 = load i32, i32* @l, align 4
   %2 = icmp eq i32 %1, 0
@@ -73,9 +73,9 @@ define hidden i32 @test2() local_unnamed_addr {
 ; CHECK-LABEL: <test3>:
 ; CHECK-LABEL: <$d.9>:
 ; CHECK-LABEL: <$x.10>:
-; CHECK-NEXT:    b #-20 <test3+0x18>
+; CHECK-NEXT:    b {{.*}} <test3+0x18>
 ; CHECK-LABEL: <$x.12>:
-; CHECK-NEXT:    b #4 <$x.12+0x4>
+; CHECK-NEXT:    b {{.*}} <$x.12+0x4>
 ; CHECK-NEXT:    mov w0, wzr
 ; CHECK-NEXT:    ldr x30, [sp], #16
 ; CHECK-NEXT:    ret

diff  --git a/llvm/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll b/llvm/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll
index 0fa051f3027b..fec68213df59 100644
--- a/llvm/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll
+++ b/llvm/test/CodeGen/AArch64/inlineasm-ldr-pseudo.ll
@@ -13,7 +13,7 @@ entry:
   ret i32 %0
 }
 ; CHECK-LABEL: <bar>:
-; CHECK:        40 00 00 58                                      ldr    x0, #8
+; CHECK:        40 00 00 58                                      ldr    x0, 0x10
 ; CHECK:        c0 03 5f d6                                      ret
 ; Make sure the constant pool entry comes after the return
 ; CHECK-LABEL:        <$d.1>:

diff  --git a/llvm/test/tools/llvm-objdump/MachO/AArch64/pc-rel-targets.test b/llvm/test/tools/llvm-objdump/MachO/AArch64/pc-rel-targets.test
index 329dd06998f8..8c7c6030c22f 100644
--- a/llvm/test/tools/llvm-objdump/MachO/AArch64/pc-rel-targets.test
+++ b/llvm/test/tools/llvm-objdump/MachO/AArch64/pc-rel-targets.test
@@ -1,3 +1,3 @@
 // RUN: llvm-objdump -d %p/Inputs/kextbundle.macho-aarch64 | FileCheck %s
 
-CHECK:  4008:       03 00 00 94     bl      #12 <_bar.stub>
+CHECK:  4008:       03 00 00 94     bl      0x4014 <_bar.stub>


        


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