[PATCH] D76158: Add inline assembly load hardening mitigation for Load Value Injection (LVI) on X86 [6/6]

[Scott Constable via Phabricator via llvm-commits]

sconstab updated this revision to Diff 256471.
sconstab added a comment.

There is now a more complete set of documentation for instructions that must be manually mitigated:

https://software.intel.com/security-software-guidance/insights/deep-dive-load-value-injection#specialinstructions

- The asm parser now emits a warning containing the above link whenever it encounters an instruction that cannot be automatically mitigated.
- Now emitting a warning if a REP/REPNE prefix is encountered without an accompanying instruction on the same line.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D76158/new/

https://reviews.llvm.org/D76158

Files:
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/test/CodeGen/X86/lvi-hardening-inline-asm.ll

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