[PATCH] D77547: AMDGPU/GlobalISel: Select llvm.amdgcn.div.scale

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 9 09:29:37 PDT 2020


arsenm marked an inline comment as done.
arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:825
+
+  Register Src0 = ChooseDenom != 0 ? Numer : Denom;
+
----------------
kerbowa wrote:
> foad wrote:
> > This doesn't seem to match the comment in IntrinsicsAMDGPU.td which says "0 = first, 1 = second" (where I assume "first" means "numerator"...).
> It looks like this is copying the SD lowering to the intermediate node for this intrinsic which doesn't match up to that comment in IntrinsicsAMDGPU.td. So the GlobalISel tests at least match the DAG version. Was the intrinsic not being used directly before? I think it needs to be changed in both places or the comment should be updated.
> 
> 
I'm not aware of any users of the intrinsic other than the GlobalISel legalization. 


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https://reviews.llvm.org/D77547





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