[llvm] 0f7aedf - [SCCP] Add tests with AND/OR branch conditions.
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 9 08:40:28 PDT 2020
Author: Florian Hahn
Date: 2020-04-09T16:39:13+01:00
New Revision: 0f7aedfd484a842a36dab58b1aeef30c0ebf012f
URL: https://github.com/llvm/llvm-project/commit/0f7aedfd484a842a36dab58b1aeef30c0ebf012f
DIFF: https://github.com/llvm/llvm-project/commit/0f7aedfd484a842a36dab58b1aeef30c0ebf012f.diff
LOG: [SCCP] Add tests with AND/OR branch conditions.
Added:
Modified:
llvm/test/Transforms/SCCP/conditions-ranges.ll
llvm/test/Transforms/SCCP/ipsccp-ssa-copy-nested-conds.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/SCCP/conditions-ranges.ll b/llvm/test/Transforms/SCCP/conditions-ranges.ll
index f2e7615e0782..f23bdfabc698 100644
--- a/llvm/test/Transforms/SCCP/conditions-ranges.ll
+++ b/llvm/test/Transforms/SCCP/conditions-ranges.ll
@@ -805,3 +805,257 @@ cond.end: ; preds = %entry, %cond.true
%conv = trunc i64 %cond to i32
ret i32 %conv
}
+
+define void @f16_conditions_and(i32 %a, i32 %b) {
+; CHECK-LABEL: @f16_conditions_and(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[LT:%.*]] = icmp ult i32 [[A:%.*]], 100
+; CHECK-NEXT: [[GT:%.*]] = icmp ugt i32 [[A]], 20
+; CHECK-NEXT: [[BC:%.*]] = and i1 [[LT]], [[GT]]
+; CHECK-NEXT: br i1 [[BC]], label [[TRUE:%.*]], label [[FALSE:%.*]]
+; CHECK: true:
+; CHECK-NEXT: [[F_1:%.*]] = icmp eq i32 [[A]], 0
+; CHECK-NEXT: call void @use(i1 [[F_1]])
+; CHECK-NEXT: [[F_2:%.*]] = icmp eq i32 [[A]], 20
+; CHECK-NEXT: call void @use(i1 [[F_2]])
+; CHECK-NEXT: call void @use(i1 false)
+; CHECK-NEXT: call void @use(i1 true)
+; CHECK-NEXT: [[T_2:%.*]] = icmp ne i32 [[A]], 20
+; CHECK-NEXT: call void @use(i1 [[T_2]])
+; CHECK-NEXT: [[C_1:%.*]] = icmp eq i32 [[A]], 21
+; CHECK-NEXT: call void @use(i1 [[C_1]])
+; CHECK-NEXT: [[C_2:%.*]] = icmp ugt i32 [[A]], 21
+; CHECK-NEXT: call void @use(i1 [[C_2]])
+; CHECK-NEXT: [[C_3:%.*]] = icmp ugt i32 [[A]], 50
+; CHECK-NEXT: call void @use(i1 [[C_3]])
+; CHECK-NEXT: ret void
+; CHECK: false:
+; CHECK-NEXT: [[F_4:%.*]] = icmp eq i32 [[A]], 50
+; CHECK-NEXT: call void @use(i1 [[F_4]])
+; CHECK-NEXT: [[T_3:%.*]] = icmp ne i32 [[A]], 50
+; CHECK-NEXT: call void @use(i1 [[T_3]])
+; CHECK-NEXT: [[C_4:%.*]] = icmp eq i32 [[A]], 10
+; CHECK-NEXT: call void @use(i1 [[C_4]])
+; CHECK-NEXT: [[C_5:%.*]] = icmp eq i32 [[B:%.*]], 100
+; CHECK-NEXT: call void @use(i1 [[C_5]])
+; CHECK-NEXT: ret void
+;
+entry:
+ %lt = icmp ult i32 %a, 100
+ %gt = icmp ugt i32 %a, 20
+ %bc = and i1 %lt, %gt
+ br i1 %bc, label %true, label %false
+
+true: ; %a in [21, 100)
+ ; Conditions below are false.
+ %f.1 = icmp eq i32 %a, 0
+ call void @use(i1 %f.1)
+ %f.2 = icmp eq i32 %a, 20
+ call void @use(i1 %f.2)
+ %f.3 = icmp ugt i32 %a, 100
+ call void @use(i1 %f.3)
+
+ ; Conditions below are true.
+ %t.1 = icmp ult i32 %a, 100
+ call void @use(i1 %t.1)
+ %t.2 = icmp ne i32 %a, 20
+ call void @use(i1 %t.2)
+
+ ; Conditions below cannot be simplified.
+ %c.1 = icmp eq i32 %a, 21
+ call void @use(i1 %c.1)
+ %c.2 = icmp ugt i32 %a, 21
+ call void @use(i1 %c.2)
+ %c.3 = icmp ugt i32 %a, 50
+ call void @use(i1 %c.3)
+ ret void
+
+false:
+; TODO: Currently there is no conditional range info in the false branch for branch conditions with an AND.
+; %a should be in in [100, 21)
+ ; Conditions below are false;
+ %f.4 = icmp eq i32 %a, 50
+ call void @use(i1 %f.4)
+
+ ; Conditions below are true;
+ %t.3 = icmp ne i32 %a, 50
+ call void @use(i1 %t.3)
+
+ ; Conditions below cannot be simplified.
+ %c.4 = icmp eq i32 %a, 10
+ call void @use(i1 %c.4)
+ %c.5 = icmp eq i32 %b, 100
+ call void @use(i1 %c.5)
+ ret void
+}
+
+define void @f17_conditions_or(i32 %a, i32 %b) {
+; CHECK-LABEL: @f17_conditions_or(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[GT:%.*]] = icmp uge i32 [[A:%.*]], 100
+; CHECK-NEXT: [[LT:%.*]] = icmp ule i32 [[A]], 20
+; CHECK-NEXT: [[BC:%.*]] = or i1 [[LT]], [[GT]]
+; CHECK-NEXT: br i1 [[BC]], label [[TRUE:%.*]], label [[FALSE:%.*]]
+; CHECK: false:
+; CHECK-NEXT: call void @use(i1 false)
+; CHECK-NEXT: call void @use(i1 false)
+; CHECK-NEXT: [[F_3:%.*]] = icmp ugt i32 [[A]], 100
+; CHECK-NEXT: call void @use(i1 [[F_3]])
+; CHECK-NEXT: [[T_1:%.*]] = icmp ult i32 [[A]], 100
+; CHECK-NEXT: call void @use(i1 [[T_1]])
+; CHECK-NEXT: call void @use(i1 true)
+; CHECK-NEXT: [[C_1:%.*]] = icmp eq i32 [[A]], 21
+; CHECK-NEXT: call void @use(i1 [[C_1]])
+; CHECK-NEXT: [[C_2:%.*]] = icmp ugt i32 [[A]], 21
+; CHECK-NEXT: call void @use(i1 [[C_2]])
+; CHECK-NEXT: [[C_3:%.*]] = icmp ugt i32 [[A]], 50
+; CHECK-NEXT: call void @use(i1 [[C_3]])
+; CHECK-NEXT: ret void
+; CHECK: true:
+; CHECK-NEXT: [[F_4:%.*]] = icmp eq i32 [[A]], 50
+; CHECK-NEXT: call void @use(i1 [[F_4]])
+; CHECK-NEXT: [[T_3:%.*]] = icmp ne i32 [[A]], 50
+; CHECK-NEXT: call void @use(i1 [[T_3]])
+; CHECK-NEXT: [[C_4:%.*]] = icmp eq i32 [[A]], 10
+; CHECK-NEXT: call void @use(i1 [[C_4]])
+; CHECK-NEXT: [[C_5:%.*]] = icmp eq i32 [[B:%.*]], 100
+; CHECK-NEXT: call void @use(i1 [[C_5]])
+; CHECK-NEXT: ret void
+;
+entry:
+ %gt = icmp uge i32 %a, 100
+ %lt = icmp ule i32 %a, 20
+ %bc = or i1 %lt, %gt
+ br i1 %bc, label %true, label %false
+
+false: ; %a in [21, 100)
+ ; Conditions below are false.
+ %f.1 = icmp eq i32 %a, 0
+ call void @use(i1 %f.1)
+ %f.2 = icmp eq i32 %a, 20
+ call void @use(i1 %f.2)
+ %f.3 = icmp ugt i32 %a, 100
+ call void @use(i1 %f.3)
+
+ ; Conditions below are true.
+ %t.1 = icmp ult i32 %a, 100
+ call void @use(i1 %t.1)
+ %t.2 = icmp ne i32 %a, 20
+ call void @use(i1 %t.2)
+
+ ; Conditions below cannot be simplified.
+ %c.1 = icmp eq i32 %a, 21
+ call void @use(i1 %c.1)
+ %c.2 = icmp ugt i32 %a, 21
+ call void @use(i1 %c.2)
+ %c.3 = icmp ugt i32 %a, 50
+ call void @use(i1 %c.3)
+ ret void
+
+true:
+; TODO: Currently there is no conditional range info in the false branch for branch conditions with an AND.
+; %a should be in in [100, 21)
+ ; Conditions below are false;
+ %f.4 = icmp eq i32 %a, 50
+ call void @use(i1 %f.4)
+
+ ; Conditions below are true;
+ %t.3 = icmp ne i32 %a, 50
+ call void @use(i1 %t.3)
+
+ ; Conditions below cannot be simplified.
+ %c.4 = icmp eq i32 %a, 10
+ call void @use(i1 %c.4)
+ %c.5 = icmp eq i32 %b, 100
+ call void @use(i1 %c.5)
+ ret void
+}
+
+; TODO: Currently only the information of the AND used as branch condition is
+; used.
+define void @f18_conditions_chained_and(i32 %a, i32 %b) {
+; CHECK-LABEL: @f18_conditions_chained_and(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[LT:%.*]] = icmp ult i32 [[A:%.*]], 100
+; CHECK-NEXT: [[GT:%.*]] = icmp ugt i32 [[A]], 20
+; CHECK-NEXT: [[BC:%.*]] = and i1 [[LT]], [[GT]]
+; CHECK-NEXT: [[B_LT:%.*]] = icmp ult i32 [[B:%.*]], 50
+; CHECK-NEXT: [[BC_2:%.*]] = and i1 [[BC]], [[B_LT]]
+; CHECK-NEXT: br i1 [[BC_2]], label [[TRUE:%.*]], label [[FALSE:%.*]]
+; CHECK: true:
+; CHECK-NEXT: [[F_1:%.*]] = icmp eq i32 [[A]], 0
+; CHECK-NEXT: call void @use(i1 [[F_1]])
+; CHECK-NEXT: [[F_2:%.*]] = icmp eq i32 [[A]], 20
+; CHECK-NEXT: call void @use(i1 [[F_2]])
+; CHECK-NEXT: [[F_3:%.*]] = icmp ugt i32 [[A]], 100
+; CHECK-NEXT: call void @use(i1 [[F_3]])
+; CHECK-NEXT: [[T_1:%.*]] = icmp ult i32 [[A]], 100
+; CHECK-NEXT: call void @use(i1 [[T_1]])
+; CHECK-NEXT: [[T_2:%.*]] = icmp ne i32 [[A]], 20
+; CHECK-NEXT: call void @use(i1 [[T_2]])
+; CHECK-NEXT: [[C_1:%.*]] = icmp eq i32 [[A]], 21
+; CHECK-NEXT: call void @use(i1 [[C_1]])
+; CHECK-NEXT: [[C_2:%.*]] = icmp ugt i32 [[A]], 21
+; CHECK-NEXT: call void @use(i1 [[C_2]])
+; CHECK-NEXT: [[C_3:%.*]] = icmp ugt i32 [[A]], 50
+; CHECK-NEXT: call void @use(i1 [[C_3]])
+; CHECK-NEXT: ret void
+; CHECK: false:
+; CHECK-NEXT: [[F_4:%.*]] = icmp eq i32 [[A]], 50
+; CHECK-NEXT: call void @use(i1 [[F_4]])
+; CHECK-NEXT: [[T_3:%.*]] = icmp ne i32 [[A]], 50
+; CHECK-NEXT: call void @use(i1 [[T_3]])
+; CHECK-NEXT: [[C_4:%.*]] = icmp eq i32 [[A]], 10
+; CHECK-NEXT: call void @use(i1 [[C_4]])
+; CHECK-NEXT: [[C_5:%.*]] = icmp eq i32 [[B]], 100
+; CHECK-NEXT: call void @use(i1 [[C_5]])
+; CHECK-NEXT: ret void
+;
+entry:
+ %lt = icmp ult i32 %a, 100
+ %gt = icmp ugt i32 %a, 20
+ %bc = and i1 %lt, %gt
+ %b.lt = icmp ult i32 %b, 50
+ %bc.2 = and i1 %bc, %b.lt
+ br i1 %bc.2, label %true, label %false
+
+true: ; %a in [21, 100)
+ ; Conditions below are false.
+ %f.1 = icmp eq i32 %a, 0
+ call void @use(i1 %f.1)
+ %f.2 = icmp eq i32 %a, 20
+ call void @use(i1 %f.2)
+ %f.3 = icmp ugt i32 %a, 100
+ call void @use(i1 %f.3)
+
+ ; Conditions below are true.
+ %t.1 = icmp ult i32 %a, 100
+ call void @use(i1 %t.1)
+ %t.2 = icmp ne i32 %a, 20
+ call void @use(i1 %t.2)
+
+ ; Conditions below cannot be simplified.
+ %c.1 = icmp eq i32 %a, 21
+ call void @use(i1 %c.1)
+ %c.2 = icmp ugt i32 %a, 21
+ call void @use(i1 %c.2)
+ %c.3 = icmp ugt i32 %a, 50
+ call void @use(i1 %c.3)
+ ret void
+
+false:
+ ; Conditions below are false;
+ %f.4 = icmp eq i32 %a, 50
+ call void @use(i1 %f.4)
+
+ ; Conditions below are true;
+ %t.3 = icmp ne i32 %a, 50
+ call void @use(i1 %t.3)
+
+ ; Conditions below cannot be simplified.
+ %c.4 = icmp eq i32 %a, 10
+ call void @use(i1 %c.4)
+ %c.5 = icmp eq i32 %b, 100
+ call void @use(i1 %c.5)
+ ret void
+}
diff --git a/llvm/test/Transforms/SCCP/ipsccp-ssa-copy-nested-conds.ll b/llvm/test/Transforms/SCCP/ipsccp-ssa-copy-nested-conds.ll
index 82f7db801bd1..a976c1603bdb 100644
--- a/llvm/test/Transforms/SCCP/ipsccp-ssa-copy-nested-conds.ll
+++ b/llvm/test/Transforms/SCCP/ipsccp-ssa-copy-nested-conds.ll
@@ -1,14 +1,45 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -ipsccp -S | FileCheck %s
; RUN: opt < %s -passes=ipsccp -S | FileCheck %s
; Test for PR39772
-; CHECK-LABEL: cleanup:
-; CHECK-NEXT: %retval.0 = phi i32 [ 0, %if.then ], [ %add, %if.then7 ], [ %add8, %if.else ]
-
%struct.Node = type { %struct.Node*, %struct.Node*, i32 }
define i32 @check(%struct.Node* %node) {
+; CHECK-LABEL: define i32 @check(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq %struct.Node* [[NODE:%.*]], null
+; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: br label [[CLEANUP:%.*]]
+; CHECK: if.end:
+; CHECK-NEXT: [[LEFT:%.*]] = getelementptr inbounds [[STRUCT_NODE:%.*]], %struct.Node* [[NODE]], i32 0, i32 0
+; CHECK-NEXT: [[TMP0:%.*]] = load %struct.Node*, %struct.Node** [[LEFT]]
+; CHECK-NEXT: [[CALL:%.*]] = call i32 @check(%struct.Node* [[TMP0]])
+; CHECK-NEXT: [[RIGHT:%.*]] = getelementptr inbounds [[STRUCT_NODE]], %struct.Node* [[NODE]], i32 0, i32 1
+; CHECK-NEXT: [[TMP1:%.*]] = load %struct.Node*, %struct.Node** [[RIGHT]]
+; CHECK-NEXT: [[CALL1:%.*]] = call i32 @check(%struct.Node* [[TMP1]])
+; CHECK-NEXT: [[TMP2:%.*]] = load %struct.Node*, %struct.Node** [[RIGHT]]
+; CHECK-NEXT: [[HEIGHT:%.*]] = getelementptr inbounds [[STRUCT_NODE]], %struct.Node* [[TMP2]], i32 0, i32 2
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[HEIGHT]]
+; CHECK-NEXT: [[CMP3:%.*]] = icmp ne i32 [[TMP3]], [[CALL1]]
+; CHECK-NEXT: br i1 [[CMP3]], label [[IF_THEN4:%.*]], label [[IF_END5:%.*]]
+; CHECK: if.then4:
+; CHECK-NEXT: unreachable
+; CHECK: if.end5:
+; CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[CALL]], [[CALL1]]
+; CHECK-NEXT: br i1 [[CMP6]], label [[IF_THEN7:%.*]], label [[IF_ELSE:%.*]]
+; CHECK: if.then7:
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL]], 1
+; CHECK-NEXT: br label [[CLEANUP]]
+; CHECK: if.else:
+; CHECK-NEXT: [[ADD8:%.*]] = add nsw i32 [[CALL1]], 1
+; CHECK-NEXT: br label [[CLEANUP]]
+; CHECK: cleanup:
+; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 0, [[IF_THEN]] ], [ [[ADD]], [[IF_THEN7]] ], [ [[ADD8]], [[IF_ELSE]] ]
+; CHECK-NEXT: ret i32 [[RETVAL_0]]
+;
entry:
%cmp = icmp eq %struct.Node* %node, null
br i1 %cmp, label %if.then, label %if.end
@@ -48,3 +79,47 @@ cleanup: ; preds = %if.else, %if.then7,
%retval.0 = phi i32 [ 0, %if.then ], [ %add, %if.then7 ], [ %add8, %if.else ]
ret i32 %retval.0
}
+
+declare i8* @test2_callee(i32, i32)
+
+define void @test2() {
+; CHECK-LABEL: @test2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[FOR_COND:%.*]]
+; CHECK: for.cond:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: br label [[IF_ELSE33:%.*]]
+; CHECK: if.else33:
+; CHECK-NEXT: br label [[IF_THEN38:%.*]]
+; CHECK: if.then38:
+; CHECK-NEXT: [[CALL42:%.*]] = call i8* @test2_callee(i32 0, i32 0)
+; CHECK-NEXT: unreachable
+;
+entry:
+ br label %for.cond
+
+for.cond: ; preds = %for.inc46, %entry
+ %op.0 = phi i32 [ 0, %entry ], [ 0, %for.inc46 ]
+ br label %for.body
+
+for.body: ; preds = %for.cond
+ %cmp24 = icmp eq i32 %op.0, 38
+ br i1 %cmp24, label %if.then26, label %if.else33
+
+if.then26: ; preds = %for.body
+ unreachable
+
+if.else33: ; preds = %for.body
+ %cmp34 = icmp ne i32 %op.0, 80
+ %cmp36 = icmp ne i32 %op.0, 81
+ %or.cond = and i1 %cmp34, %cmp36
+ br i1 %or.cond, label %if.then38, label %for.inc46
+
+if.then38: ; preds = %if.else33
+ %call42 = call i8* @test2_callee(i32 %op.0, i32 0)
+ unreachable
+
+for.inc46: ; preds = %if.else33
+ br label %for.cond
+}
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