[llvm] b393fc6 - [PowerPC][NFC] Add more check directives in only cxx_fast_tlscc lit test.

[Sean Fertile via llvm-commits]

Author: Sean Fertile
Date: 2020-04-09T10:29:24-04:00
New Revision: b393fc6850a24721e0282a47584bf2af998c18b4

URL: https://github.com/llvm/llvm-project/commit/b393fc6850a24721e0282a47584bf2af998c18b4
DIFF: https://github.com/llvm/llvm-project/commit/b393fc6850a24721e0282a47584bf2af998c18b4.diff

LOG: [PowerPC][NFC] Add more check directives in only cxx_fast_tlscc lit test.

Use utils/update_llc_test_checks.py to add full CHECK directives to the
test for cxx_fast_tls calling convention. The calling convention is
arguably dead on PowerPC since dropping Darwin subtarget support in the PowerPC
backend. This test change helps show the atrocious code generation for
this lit test which was hidden by having few CHECK directives.

Added: 
    

Modified: 
    llvm/test/CodeGen/PowerPC/cxx_tlscc64.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/PowerPC/cxx_tlscc64.ll b/llvm/test/CodeGen/PowerPC/cxx_tlscc64.ll
index d17f4c952456..e37b5c61d241 100644
--- a/llvm/test/CodeGen/PowerPC/cxx_tlscc64.ll
+++ b/llvm/test/CodeGen/PowerPC/cxx_tlscc64.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -relocation-model=static -verify-machineinstrs < %s --enable-shrink-wrap=false -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s
 %struct.S = type { i8 }
 
@@ -10,33 +11,102 @@ declare void @_ZN1SC1Ev(%struct.S*)
 declare void @_ZN1SD1Ev(%struct.S*)
 declare i32 @_tlv_atexit(void (i8*)*, i8*, i8*)
 
-; CHECK-LABEL: _ZTW2sg
 define cxx_fast_tlscc nonnull %struct.S* @_ZTW2sg() nounwind {
+; CHECK-LABEL: _ZTW2sg:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    mflr 0
+; CHECK-NEXT:    std 0, 16(1)
+; CHECK-NEXT:    stdu 1, -48(1)
+; CHECK-NEXT:    addis 3, 13, __tls_guard at tprel@ha
+; CHECK-NEXT:    lbz 4, __tls_guard at tprel@l(3)
+; CHECK-NEXT:    andi. 4, 4, 1
+; CHECK-NEXT:    bc 12, 1, .LBB0_2
+; CHECK-NEXT:  # %bb.1: # %init.i
+; CHECK-NEXT:    li 4, 1
+; CHECK-NEXT:    std 31, 40(1) # 8-byte Folded Spill
+; CHECK-NEXT:    mr 31, 14
+; CHECK-NEXT:    mr 14, 15
+; CHECK-NEXT:    mr 15, 16
+; CHECK-NEXT:    mr 16, 17
+; CHECK-NEXT:    stb 4, __tls_guard at tprel@l(3)
+; CHECK-NEXT:    addis 3, 13, sg at tprel@ha
+; CHECK-NEXT:    mr 17, 18
+; CHECK-NEXT:    mr 18, 19
+; CHECK-NEXT:    mr 19, 20
+; CHECK-NEXT:    mr 20, 21
+; CHECK-NEXT:    mr 21, 22
+; CHECK-NEXT:    mr 22, 23
+; CHECK-NEXT:    mr 23, 24
+; CHECK-NEXT:    mr 24, 25
+; CHECK-NEXT:    mr 25, 26
+; CHECK-NEXT:    mr 26, 27
+; CHECK-NEXT:    mr 27, 28
+; CHECK-NEXT:    mr 28, 29
+; CHECK-NEXT:    mr 29, 30
+; CHECK-NEXT:    addi 30, 3, sg at tprel@l
+; CHECK-NEXT:    mr 3, 30
+; CHECK-NEXT:    bl _ZN1SC1Ev
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    addis 3, 2, .LC0 at toc@ha
+; CHECK-NEXT:    addis 4, 2, .LC1 at toc@ha
+; CHECK-NEXT:    ld 3, .LC0 at toc@l(3)
+; CHECK-NEXT:    ld 5, .LC1 at toc@l(4)
+; CHECK-NEXT:    mr 4, 30
+; CHECK-NEXT:    mr 30, 29
+; CHECK-NEXT:    mr 29, 28
+; CHECK-NEXT:    mr 28, 27
+; CHECK-NEXT:    mr 27, 26
+; CHECK-NEXT:    mr 26, 25
+; CHECK-NEXT:    mr 25, 24
+; CHECK-NEXT:    mr 24, 23
+; CHECK-NEXT:    mr 23, 22
+; CHECK-NEXT:    mr 22, 21
+; CHECK-NEXT:    mr 21, 20
+; CHECK-NEXT:    mr 20, 19
+; CHECK-NEXT:    mr 19, 18
+; CHECK-NEXT:    mr 18, 17
+; CHECK-NEXT:    mr 17, 16
+; CHECK-NEXT:    mr 16, 15
+; CHECK-NEXT:    mr 15, 14
+; CHECK-NEXT:    mr 14, 31
+; CHECK-NEXT:    ld 31, 40(1) # 8-byte Folded Reload
+; CHECK-NEXT:    bl _tlv_atexit
+; CHECK-NEXT:    nop
+; CHECK-NEXT:  .LBB0_2: # %__tls_init.exit
+; CHECK-NEXT:    addis 3, 13, sg at tprel@ha
+; CHECK-NEXT:    addi 3, 3, sg at tprel@l
+; CHECK-NEXT:    addi 1, 1, 48
+; CHECK-NEXT:    ld 0, 16(1)
+; CHECK-NEXT:    mtlr 0
+; CHECK-NEXT:    blr
   %.b.i = load i1, i1* @__tls_guard, align 1
-; CHECK: bc 12, 1, [[BB_end:.?LBB0_[0-9]+]]
   br i1 %.b.i, label %__tls_init.exit, label %init.i
 
 init.i:
-; CHECK: Folded Spill
   store i1 true, i1* @__tls_guard, align 1
   tail call void @_ZN1SC1Ev(%struct.S* nonnull @sg) #2
-; CHECK: bl _ZN1SC1Ev
   %1 = tail call i32 @_tlv_atexit(void (i8*)* nonnull bitcast (void (%struct.S*)* @_ZN1SD1Ev to void (i8*)*), i8* nonnull getelementptr inbounds (%struct.S, %struct.S* @sg, i64 0, i32 0), i8* nonnull @__dso_handle) #2
-; CHECK: Folded Reload
-; CHECK: _tlv_atexit
   br label %__tls_init.exit
 
-; CHECK: [[BB_end]]:
 __tls_init.exit:
   ret %struct.S* @sg
 }
 
-; CHECK-LABEL: _ZTW4sum1
 define cxx_fast_tlscc nonnull i32* @_ZTW4sum1() nounwind {
+; CHECK-LABEL: _ZTW4sum1:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    addis 3, 13, sum1 at tprel@ha
+; CHECK-NEXT:    addi 3, 3, sum1 at tprel@l
+; CHECK-NEXT:    blr
   ret i32* @sum1
 }
 
 define cxx_fast_tlscc i32* @_ZTW4sum2() #0 {
+; CHECK-LABEL: _ZTW4sum2:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    addis 3, 13, sum1 at tprel@ha
+; CHECK-NEXT:    addi 3, 3, sum1 at tprel@l
+; CHECK-NEXT:    blr
   ret i32* @sum1
 }