[PATCH] D77773: PowerPC: Don't lower SELECT_CC to PPCISD::FSEL on SPE

[Justin Hibbits via Phabricator via llvm-commits]

jhibbits created this revision.
jhibbits added a reviewer: PowerPC.
Herald added subscribers: llvm-commits, shchenz, kbarton, hiraditya, nemanjai.
Herald added a project: LLVM.

SPE doesn't have a fsel instruction, so don't try to lower to it.

This fixes a "Cannot select: tN: f64 = PPCISD::FSEL tX, tY, tZ" error.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D77773

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/spe-fastmath.ll


Index: llvm/test/CodeGen/PowerPC/spe-fastmath.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/spe-fastmath.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu \
+; RUN:          -mattr=+spe |  FileCheck %s
+
+define void @no_fsel(i32 %e) #0 {
+; CHECK-LABEL: no_fsel:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NOT:  fsel {{[0-9]+]}}, {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
+entry:
+  %conv = uitofp i32 %e to double
+  %mul = fmul double %conv, %conv
+  %tobool = fcmp une double %mul, 0.000000e+00
+  %cond = select i1 %tobool, double %conv, double 0.000000e+00
+  %conv3 = fptosi double %cond to i16
+  store i16 %conv3, i16* undef
+  ret void
+}
+
+attributes #0 = { "no-infs-fp-math"="true" "no-nans-fp-math"="true" }
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -7764,9 +7764,10 @@
 /// LowerSELECT_CC - Lower floating point select_cc's into fsel instruction when
 /// possible.
 SDValue PPCTargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {
-  // Not FP? Not a fsel.
+  // Not FP, or using SPE? Not a fsel.
   if (!Op.getOperand(0).getValueType().isFloatingPoint() ||
-      !Op.getOperand(2).getValueType().isFloatingPoint())
+      !Op.getOperand(2).getValueType().isFloatingPoint() ||
+      Subtarget.hasSPE())
     return Op;
 
   ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();


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