[PATCH] D77758: [SVE] Remove calls to isScalable from AARCH64

[Christopher Tetreault via Phabricator via llvm-commits]

ctetreau created this revision.
Herald added subscribers: llvm-commits, psnobl, rkruppe, hiraditya, kristof.beyls, tschuett.
Herald added a reviewer: efriedma.
Herald added a project: LLVM.
ctetreau added reviewers: sdesmalen, t.p.northover, mcrosier.
ctetreau added a comment.

While immediate feedback would be greatly appreciated, this commit won't actually build until D77587 <https://reviews.llvm.org/D77587> is merged. I'll ping the thread when this happens if this commit hasn't been accepted yet.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D77758

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp


Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -9694,7 +9694,7 @@
     return false;
 
   // FIXME: Update this method to support scalable addressing modes.
-  if (Ty->isVectorTy() && cast<VectorType>(Ty)->isScalable())
+  if (isa<ScalableVectorType>(Ty))
     return AM.HasBaseReg && !AM.BaseOffs && !AM.Scale;
 
   // check reg + imm case:


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