[PATCH] D76902: [PowerPC][AIX] ByVal formal argument support: multiple registers

Sean Fertile via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 8 08:40:04 PDT 2020


sfertile marked 2 inline comments as done.
sfertile added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:7073
 
-      const unsigned StackSize = alignTo(ByValSize, PtrByteSize);
+      const unsigned StackSize = alignTo(Flags.getByValSize(), PtrByteSize);
       const int FI = MF.getFrameInfo().CreateFixedObject(
----------------
cebowleratibm wrote:
> We currently error on byval alignment > PtrByteSize.  I'd be inclined to assert it here as well to make it really hard to emit invalid code.
> 
> (Noting that we need to decide how to handle 8 byte aligned structs in 32-bit mode)
Good point. I was expecting `CC_AIX` to handle it by either burning registers, or adjusting the stack offset to a properly aligned address and so it should be a nop in the formal argument handling. I added a fatal error so that I can remove it and add lit testing after we remove the limitation in CC_AIX.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D76902/new/

https://reviews.llvm.org/D76902





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