[PATCH] D76354: [WIP][RISCV][GlobalISel] Legalize types for ALU operations

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 8 07:02:36 PDT 2020


arsenm added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVLegalizerInfo.cpp:51
+  getActionDefinitionsBuilder({G_ZEXT, G_SEXT, G_ANYEXT})
+      .legalIf([](const LegalityQuery &Query) { return false; })
+      .clampScalar(0, XLenLLT, XLenLLT);
----------------
returning false here is entirely pointless, you can just delete this


================
Comment at: llvm/test/CodeGen/RISCV/GlobalISel/legalizer/alu32.mir:9
+  ; Extends only exhaustively tested for add to avoid excessive tests.
+  define void @add_i8() { entry: ret void }
+  define void @add_i8_signext() { entry: ret void }
----------------
You don't need the IR section here


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D76354/new/

https://reviews.llvm.org/D76354





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