[PATCH] D77678: [mlir][Linalg] Add loop.parallel lowering for all Linalg Ops.
Uday Bondhugula via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 7 21:13:54 PDT 2020
bondhugula requested changes to this revision.
bondhugula added inline comments.
This revision now requires changes to proceed.
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Comment at: mlir/test/Dialect/Linalg/loops.mlir:128
+// CHECKLOOP: %[[C:.*]] = std.view %{{.*}}[][] : memref<?xi8> to memref<f32>
+// CHECKLOOP: loop.for %{{.*}} = %{{.*}} to %[[K]] step %{{.*}} {
+// CHECKLOOP-DAG: %[[a:.*]] = load %[[A]][%{{.*}}] : memref<?xf32, #[[strided1D]]>
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Is there a need to match all of the trailing 'step %{{.*}}'? You always print step right?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D77678/new/
https://reviews.llvm.org/D77678
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