[PATCH] D77265: Clean up usages of asserting vector getters in Type
Christopher Tetreault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 7 15:16:56 PDT 2020
ctetreau updated this revision to Diff 255827.
ctetreau added a comment.
rebase, mention SystemZ in commit message
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D77265/new/
https://reviews.llvm.org/D77265
Files:
llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
Index: llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
+++ llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
@@ -359,7 +359,8 @@
// 3.
static unsigned getNumVectorRegs(Type *Ty) {
assert(Ty->isVectorTy() && "Expected vector type");
- unsigned WideBits = getScalarSizeInBits(Ty) * Ty->getVectorNumElements();
+ unsigned WideBits =
+ getScalarSizeInBits(Ty) * cast<VectorType>(Ty)->getNumElements();
assert(WideBits > 0 && "Could not compute size of vector");
return ((WideBits % 128U) ? ((WideBits / 128U) + 1) : (WideBits / 128U));
}
@@ -459,7 +460,7 @@
return DivInstrCost;
}
else if (ST->hasVector()) {
- unsigned VF = Ty->getVectorNumElements();
+ unsigned VF = cast<VectorType>(Ty)->getNumElements();
unsigned NumVectors = getNumVectorRegs(Ty);
// These vector operations are custom handled, but are still supported
@@ -580,8 +581,9 @@
assert (SrcTy->isVectorTy() && DstTy->isVectorTy());
assert (SrcTy->getPrimitiveSizeInBits() > DstTy->getPrimitiveSizeInBits() &&
"Packing must reduce size of vector type.");
- assert (SrcTy->getVectorNumElements() == DstTy->getVectorNumElements() &&
- "Packing should not change number of elements.");
+ assert(cast<VectorType>(SrcTy)->getNumElements() ==
+ cast<VectorType>(DstTy)->getNumElements() &&
+ "Packing should not change number of elements.");
// TODO: Since fp32 is expanded, the extract cost should always be 0.
@@ -596,7 +598,7 @@
unsigned Cost = 0;
unsigned Log2Diff = getElSizeLog2Diff(SrcTy, DstTy);
- unsigned VF = SrcTy->getVectorNumElements();
+ unsigned VF = cast<VectorType>(SrcTy)->getNumElements();
for (unsigned P = 0; P < Log2Diff; ++P) {
if (NumParts > 1)
NumParts /= 2;
@@ -670,7 +672,7 @@
getBoolVecToIntConversionCost(unsigned Opcode, Type *Dst,
const Instruction *I) {
assert (Dst->isVectorTy());
- unsigned VF = Dst->getVectorNumElements();
+ unsigned VF = cast<VectorType>(Dst)->getNumElements();
unsigned Cost = 0;
// If we know what the widths of the compared operands, get any cost of
// converting it to match Dst. Otherwise assume same widths.
@@ -719,7 +721,7 @@
}
else if (ST->hasVector()) {
assert (Dst->isVectorTy());
- unsigned VF = Src->getVectorNumElements();
+ unsigned VF = cast<VectorType>(Src)->getNumElements();
unsigned NumDstVectors = getNumVectorRegs(Dst);
unsigned NumSrcVectors = getNumVectorRegs(Src);
@@ -846,7 +848,7 @@
}
}
else if (ST->hasVector()) {
- unsigned VF = ValTy->getVectorNumElements();
+ unsigned VF = cast<VectorType>(ValTy)->getNumElements();
// Called with a compare instruction.
if (Opcode == Instruction::ICmp || Opcode == Instruction::FCmp) {
@@ -1089,7 +1091,7 @@
// Return the ceiling of dividing A by B.
auto ceil = [](unsigned A, unsigned B) { return (A + B - 1) / B; };
- unsigned NumElts = VecTy->getVectorNumElements();
+ unsigned NumElts = cast<VectorType>(VecTy)->getNumElements();
assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor");
unsigned VF = NumElts / Factor;
unsigned NumEltsPerVecReg = (128U / getScalarSizeInBits(VecTy));
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