[PATCH] D76060: [NFC][DAGCombine] Extract post-inc logic
David Spickett via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 7 08:39:45 PDT 2020
DavidSpickett added a comment.
Hi @samparker , this change caused a regression in Spec2k6 which we run in Linaro's CI. The root cause seems to be that loads with a post increment became load plus an add in one specific function. Certainly unexpected for an NFC change.
E.g.
- ldr x1, [x20], #48
+ ldr x1, [x1]
+ add x2, x19, #48
To reproduce build the attached source file with:
clang -O2 --target=aarch64-linux-gnu -c ~/io_lat4.i -S -o -
You should see a difference in the "write_checksum" function.
F11683963: io_lat4.i <https://reviews.llvm.org/F11683963>
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D76060/new/
https://reviews.llvm.org/D76060
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