[PATCH] D77228: [AMDGPU] Disable 'Skip Uniform Regions' optimization by default for AMDGPU; add support for -opt-bisect-limit; update tests.

Konstantin Pyzhov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 6 10:20:33 PDT 2020


This revision was automatically updated to reflect the committed changes.
Closed by commit rGe1730cfeb358: [AMDGPU] Disable 'Skip Uniform Regions' optimization by default for AMDGPU. (authored by kpyzhov).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77228/new/

https://reviews.llvm.org/D77228

Files:
  llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
  llvm/test/CodeGen/AMDGPU/branch-relaxation-debug-info.ll
  llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
  llvm/test/CodeGen/AMDGPU/branch-uniformity.ll
  llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
  llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
  llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
  llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
  llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
  llvm/test/CodeGen/AMDGPU/early-if-convert.ll
  llvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
  llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
  llvm/test/CodeGen/AMDGPU/infinite-loop.ll
  llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
  llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
  llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
  llvm/test/CodeGen/AMDGPU/salu-to-valu.ll
  llvm/test/CodeGen/AMDGPU/sdiv64.ll
  llvm/test/CodeGen/AMDGPU/setcc.ll
  llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
  llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
  llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
  llvm/test/CodeGen/AMDGPU/srem64.ll
  llvm/test/CodeGen/AMDGPU/udiv64.ll
  llvm/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll
  llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
  llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll
  llvm/test/CodeGen/AMDGPU/urem64.ll
  llvm/test/CodeGen/AMDGPU/valu-i1.ll
  llvm/test/CodeGen/AMDGPU/wqm.ll

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