[PATCH] D77558: PowerPC: Don't hoist float multiply + add to fused operation on SPE

[Justin Hibbits via Phabricator via llvm-commits]

jhibbits created this revision.
jhibbits added a reviewer: PowerPC.
Herald added subscribers: llvm-commits, shchenz, kbarton, hiraditya, nemanjai.
Herald added a project: LLVM.

SPE doesn't have a fmadd instruction, so don't bother hoisting a
multiply and add sequence to this, as it'd become just a library call.
This happens too late for the CTR usability test to veto using the CTR
in a loop, and results in an assert "Invalid PPC CTR loop!".

A test is forthcoming.  This may be the wrong approach, and a better approach
may be instead to use a feature flag, or something else, for the CPU.  However,
since the "traditional" FPU and all its derivatives have fmadd, I didn't see it
necessary for solving this problem.  There may be additional CTR related
problems on SPE, though, that I haven't found yet.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D77558

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -15474,6 +15474,8 @@
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function &F,
                                                    Type *Ty) const {
+  if (Subtarget.hasSPE())
+    return false;
   switch (Ty->getScalarType()->getTypeID()) {
   case Type::FloatTyID:
   case Type::DoubleTyID:


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