[llvm] cb6aeb2 - [ARM] Add data gathering hint instruction

[Ties Stuij via llvm-commits]

Author: Oliver Stannard
Date: 2020-04-05T15:21:00+01:00
New Revision: cb6aeb223929416f98bb4157782869e4d77aec52

URL: https://github.com/llvm/llvm-project/commit/cb6aeb223929416f98bb4157782869e4d77aec52
DIFF: https://github.com/llvm/llvm-project/commit/cb6aeb223929416f98bb4157782869e4d77aec52.diff

LOG: [ARM] Add data gathering hint instruction

Summary:
This patch upstreams support the optional ARMv8.0 Data Gathering Hint (DGH)
extension, which adds the Data Gathering Hint instruction to the hint
space.

See ARMv8.0-DGH in the Arm Architecture Reference Manual Armv8 for more
information.

Reviewers: t.p.northover, rengolin, SjoerdMeijer, ab, danielkiss, samparker

Reviewed By: SjoerdMeijer

Subscribers: LukeGeeson, ostannard, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77097

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64InstrInfo.td
    llvm/test/MC/AArch64/basic-a64-instructions.s
    llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index edff05a51438..f634642a3b59 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -711,6 +711,7 @@ def : InstAlias<"wfe",  (HINT 0b010)>;
 def : InstAlias<"wfi",  (HINT 0b011)>;
 def : InstAlias<"sev",  (HINT 0b100)>;
 def : InstAlias<"sevl", (HINT 0b101)>;
+def : InstAlias<"dgh",  (HINT 0b110)>;
 def : InstAlias<"esb",  (HINT 0b10000)>, Requires<[HasRAS]>;
 def : InstAlias<"csdb", (HINT 20)>;
 def : InstAlias<"bti",  (HINT 32)>, Requires<[HasBTI]>;

diff  --git a/llvm/test/MC/AArch64/basic-a64-instructions.s b/llvm/test/MC/AArch64/basic-a64-instructions.s
index 933f8b668bfd..58070154eb19 100644
--- a/llvm/test/MC/AArch64/basic-a64-instructions.s
+++ b/llvm/test/MC/AArch64/basic-a64-instructions.s
@@ -3465,12 +3465,14 @@ _func:
         wfi
         sev
         sevl
+        dgh
 // CHECK: nop                             // encoding: [0x1f,0x20,0x03,0xd5]
 // CHECK: yield                           // encoding: [0x3f,0x20,0x03,0xd5]
 // CHECK: wfe                             // encoding: [0x5f,0x20,0x03,0xd5]
 // CHECK: wfi                             // encoding: [0x7f,0x20,0x03,0xd5]
 // CHECK: sev                             // encoding: [0x9f,0x20,0x03,0xd5]
 // CHECK: sevl                            // encoding: [0xbf,0x20,0x03,0xd5]
+// CHECK: dgh                             // encoding: [0xdf,0x20,0x03,0xd5]
 
         clrex
         clrex #0

diff  --git a/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt b/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
index 856197018d04..922b428921ad 100644
--- a/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
+++ b/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
@@ -3033,6 +3033,7 @@
 # CHECK: wfi
 # CHECK: sev
 # CHECK: sevl
+# CHECK: dgh
 0x1f 0x20 0x3 0xd5
 0xff 0x2f 0x3 0xd5
 0x1f 0x20 0x3 0xd5
@@ -3041,6 +3042,7 @@
 0x7f 0x20 0x3 0xd5
 0x9f 0x20 0x3 0xd5
 0xbf 0x20 0x3 0xd5
+0xdf,0x20,0x3,0xd5
 
 # CHECK: clrex
 # CHECK: clrex    #0