[PATCH] D77352: [llvm] Fix missing FileCheck directive colons

[Jonathan Roelofs via Phabricator via llvm-commits]

jroelofs updated this revision to Diff 255046.
jroelofs added a comment.

Rebased


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77352/new/

https://reviews.llvm.org/D77352

Files:
  llvm/test/Analysis/AliasSet/saturation.ll
  llvm/test/Analysis/CostModel/AMDGPU/fmul.ll
  llvm/test/Analysis/MemorySSA/volatile-clobber.ll
  llvm/test/Analysis/ValueTracking/known-nonnull-at.ll
  llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
  llvm/test/Assembler/immarg-param-attribute.ll
  llvm/test/CodeGen/AArch64/arm64-neon-v8.1a.ll
  llvm/test/CodeGen/AArch64/arm64-vfloatintrinsics.ll
  llvm/test/CodeGen/AArch64/note-gnu-property-pac-bti-0.ll
  llvm/test/CodeGen/AArch64/note-gnu-property-pac-bti-1.ll
  llvm/test/CodeGen/AArch64/note-gnu-property-pac-bti-2.ll
  llvm/test/CodeGen/AArch64/note-gnu-property-pac-bti-3.ll
  llvm/test/CodeGen/AArch64/note-gnu-property-pac-bti-4.ll
  llvm/test/CodeGen/AArch64/note-gnu-property-pac-bti-5.ll
  llvm/test/CodeGen/AArch64/note-gnu-property-pac-bti-8.ll
  llvm/test/CodeGen/AArch64/stp-opt-with-renaming.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workgroup.id.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
  llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
  llvm/test/CodeGen/AMDGPU/call-argument-types.ll
  llvm/test/CodeGen/AMDGPU/ds_read2.ll
  llvm/test/CodeGen/AMDGPU/flat-offset-bug.ll
  llvm/test/CodeGen/AMDGPU/fmuladd.f32.ll
  llvm/test/CodeGen/AMDGPU/function-args.ll
  llvm/test/CodeGen/AMDGPU/illegal-sgpr-to-vgpr-copy.ll
  llvm/test/CodeGen/AMDGPU/insert-skip-from-vcc.mir
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workgroup.id.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id.ll
  llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
  llvm/test/CodeGen/AMDGPU/llvm.rint.f64.ll
  llvm/test/CodeGen/AMDGPU/merge-m0.mir
  llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
  llvm/test/CodeGen/AMDGPU/promote-alloca-no-opts.ll
  llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll
  llvm/test/CodeGen/AMDGPU/salu-to-valu.ll
  llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir
  llvm/test/CodeGen/AMDGPU/si-scheduler.ll
  llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
  llvm/test/CodeGen/AMDGPU/udivrem24.ll
  llvm/test/CodeGen/ARM/acle-intrinsics.ll
  llvm/test/CodeGen/ARM/debug-segmented-stacks.ll
  llvm/test/CodeGen/BPF/rodata_4.ll
  llvm/test/CodeGen/Hexagon/constant_compound.ll
  llvm/test/CodeGen/Hexagon/intrinsics/v65.ll
  llvm/test/CodeGen/Mips/nmadd.ll
  llvm/test/CodeGen/NVPTX/atomics-sm60.ll
  llvm/test/CodeGen/NVPTX/intrinsics.ll
  llvm/test/CodeGen/NVPTX/param-load-store.ll
  llvm/test/CodeGen/NVPTX/sqrt-approx.ll
  llvm/test/CodeGen/NVPTX/vector-loads.ll
  llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs-kill-flag.mir
  llvm/test/CodeGen/PowerPC/f128-arith.ll
  llvm/test/CodeGen/PowerPC/fastcc_stacksize.ll
  llvm/test/CodeGen/PowerPC/spe.ll
  llvm/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll
  llvm/test/CodeGen/PowerPC/xray-ret-is-terminator.ll
  llvm/test/CodeGen/Thumb2/float-ops.ll
  llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll
  llvm/test/CodeGen/X86/avx-vzeroupper.ll
  llvm/test/CodeGen/X86/inline-0bh.ll
  llvm/test/CodeGen/X86/scavenger.mir
  llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir
  llvm/test/DebugInfo/X86/objc-property-void.ll
  llvm/test/Instrumentation/AddressSanitizer/basic-msvc64.ll
  llvm/test/Instrumentation/AddressSanitizer/force-dynamic-shadow.ll
  llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
  llvm/test/Instrumentation/SanitizerCoverage/const-cmp-tracing.ll
  llvm/test/MC/AArch64/tme-error.s
  llvm/test/MC/Disassembler/ARM/vstrldr_sys.txt
  llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt
  llvm/test/MC/Mips/mul-macro-variants.s
  llvm/test/ObjectYAML/MachO/fat_macho_i386_x86_64.yaml
  llvm/test/Transforms/AtomicExpand/SPARC/libcalls.ll
  llvm/test/Transforms/Attributor/nofree.ll
  llvm/test/Transforms/CallSiteSplitting/callsite-instructions-before-call.ll
  llvm/test/Transforms/CodeExtractor/PartialInlineLiveAcross.ll
  llvm/test/Transforms/CodeExtractor/PartialInlineNoLiveOut.ll
  llvm/test/Transforms/EntryExitInstrumenter/mcount.ll
  llvm/test/Transforms/GuardWidening/loop-schedule.ll
  llvm/test/Transforms/InferFunctionAttrs/norecurse_debug.ll
  llvm/test/Transforms/InstCombine/atomic.ll
  llvm/test/Transforms/InstCombine/debuginfo-dce2.ll
  llvm/test/Transforms/InstCombine/intptr1.ll
  llvm/test/Transforms/LoopUnroll/peel-loop-negative.ll
  llvm/test/Transforms/LoopVectorize/ARM/prefer-tail-loop-folding.ll
  llvm/test/Transforms/LoopVectorize/debugloc.ll
  llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
  llvm/test/Transforms/LoopVectorize/followup.ll
  llvm/test/Transforms/PGOProfile/icp_invoke.ll
  llvm/test/Transforms/PGOProfile/memop_clone.ll
  llvm/test/Transforms/SimplifyCFG/Hexagon/switch-to-lookup-table.ll
  llvm/test/Transforms/SimplifyCFG/pr33605.ll
  llvm/test/tools/llvm-dwarfdump/X86/statistics.ll
  llvm/test/tools/llvm-profdata/value-prof.proftext
  llvm/test/tools/llvm-symbolizer/sym.test

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