[PATCH] D74486: [PowerPC][Future] Add initial support for PC Relative addressing for constant pool loads

[Anil Mahmud via Phabricator via llvm-commits]

anil9 added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPC.h:102
+    /// MO_PCREL_FLAG - If this bit is set, the symbol reference is relative to
+    /// the current instruction address(pc), e.g., var at pcrel. Fixup is VK_PCREL.
+    MO_PCREL_FLAG = 16,
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"Fixup is VK_PCREL".  or is it the variant kind ?


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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:2319
+  // If we have a PC Relative target flag don't select as [reg+reg]. It will be
+  // a [pc+imm].
+  if (SelectAddressPCRel(N, Base))
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In the comment above the function it says when it returns false, now that you have another condition when it returns false I think you should update the comment.


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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:2405
 /// a signed 16-bit displacement [r+imm], and if it is not better
 /// represented as reg+reg.  If \p EncodingAlignment is non-zero, only accept
 /// displacements that are multiples of that value.
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Update the comment.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74486/new/

https://reviews.llvm.org/D74486