[llvm] 85adce3 - [PPCInstPrinter] Change B to print the target address in hexadecimal form
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 1 22:38:34 PDT 2020
Author: Fangrui Song
Date: 2020-04-01T22:38:24-07:00
New Revision: 85adce3d73589adc5f6ae486ebd035238fb20ac5
URL: https://github.com/llvm/llvm-project/commit/85adce3d73589adc5f6ae486ebd035238fb20ac5
DIFF: https://github.com/llvm/llvm-project/commit/85adce3d73589adc5f6ae486ebd035238fb20ac5.diff
LOG: [PPCInstPrinter] Change B to print the target address in hexadecimal form
Follow-up of D76591 and D76907
Added:
Modified:
lld/test/ELF/ppc32-call-stub-nopic.s
lld/test/ELF/ppc32-call-stub-pic.s
lld/test/ELF/ppc32-canonical-plt.s
lld/test/ELF/ppc32-local-branch.s
lld/test/ELF/ppc32-reloc-rel.s
lld/test/ELF/ppc64-call-reach.s
lld/test/ELF/ppc64-reloc-rel.s
lld/test/ELF/ppc64-toc-restore.s
llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/test/CodeGen/PowerPC/alignlongjumptest.mir
llvm/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s
Removed:
################################################################################
diff --git a/lld/test/ELF/ppc32-call-stub-nopic.s b/lld/test/ELF/ppc32-call-stub-nopic.s
index 118b52a8db99..272a8b2ad360 100644
--- a/lld/test/ELF/ppc32-call-stub-nopic.s
+++ b/lld/test/ELF/ppc32-call-stub-nopic.s
@@ -47,8 +47,8 @@
## These instructions are referenced by .plt entries.
# CHECK: 10010200 <.glink>:
-# CHECK-NEXT: b .+8
-# CHECK-NEXT: b .+4
+# CHECK-NEXT: b 0x10010208
+# CHECK-NEXT: b 0x10010208
## PLTresolve
## Operands of lis & lwz: .got+4 = 0x10020070+4 = 65536*4098+700
diff --git a/lld/test/ELF/ppc32-call-stub-pic.s b/lld/test/ELF/ppc32-call-stub-pic.s
index 179874620f31..b9e19791e485 100644
--- a/lld/test/ELF/ppc32-call-stub-pic.s
+++ b/lld/test/ELF/ppc32-call-stub-pic.s
@@ -107,11 +107,10 @@
# HEX: 0x0004036c 00010294 00010298 0001029c
## These instructions are referenced by .plt entries.
-# PIE: 00010294 <.glink>:
-# SHARED: 000102b4 <.glink>:
-# CHECK-NEXT: b .+12
-# CHECK-NEXT: b .+8
-# CHECK-NEXT: b .+4
+# CHECK: [[#%x,GLINK:]] <.glink>:
+# CHECK-NEXT: b 0x[[#%x,GLINK+12]]
+# CHECK-NEXT: b 0x[[#%x,GLINK+12]]
+# CHECK-NEXT: b 0x[[#%x,GLINK+12]]
## PLTresolve
## Operand of addi: 0x100a8-.glink = 24
diff --git a/lld/test/ELF/ppc32-canonical-plt.s b/lld/test/ELF/ppc32-canonical-plt.s
index 027f2aa7e222..f29e66ea0c28 100644
--- a/lld/test/ELF/ppc32-canonical-plt.s
+++ b/lld/test/ELF/ppc32-canonical-plt.s
@@ -57,9 +57,9 @@
# CHECK-NEXT: bctr
## The 3 b instructions are referenced by .plt entries.
-# CHECK-NEXT: 1001025c: b .+12
-# CHECK-NEXT: b .+8
-# CHECK-NEXT: b .+4
+# CHECK-NEXT: 1001025c: b 0x10010268
+# CHECK-NEXT: b 0x10010268
+# CHECK-NEXT: b 0x10010268
## PLTresolve of 64 bytes is at the end.
## Operands of addis & addi: -0x1001025c = 65536*-4097-604
diff --git a/lld/test/ELF/ppc32-local-branch.s b/lld/test/ELF/ppc32-local-branch.s
index 526bea609122..95099df43be2 100644
--- a/lld/test/ELF/ppc32-local-branch.s
+++ b/lld/test/ELF/ppc32-local-branch.s
@@ -7,10 +7,10 @@
## R_PPC_REL24 and R_PPC_PLTREL24 are converted to PC relative relocations if the
## symbol is non-preemptable. The addend of R_PPC_PLTREL24 should be ignored.
-# CHECK: <_start>:
-# CHECK-NEXT: b .+12
-# CHECK-NEXT: b .+8
-# CHECK-NEXT: b .+4
+# CHECK: [[#%x,ADDR:]] <_start>:
+# CHECK-NEXT: b 0x[[#%x,ADDR+12]]
+# CHECK-NEXT: b 0x[[#%x,ADDR+12]]
+# CHECK-NEXT: b 0x[[#%x,ADDR+12]]
# CHECK-EMPTY:
# CHECK-NEXT: <foo>:
diff --git a/lld/test/ELF/ppc32-reloc-rel.s b/lld/test/ELF/ppc32-reloc-rel.s
index b2bd0a461ca1..fefeeba5e2fe 100644
--- a/lld/test/ELF/ppc32-reloc-rel.s
+++ b/lld/test/ELF/ppc32-reloc-rel.s
@@ -13,7 +13,7 @@
b 1f
1:
# CHECK-LABEL: section .R_PPC_REL24:
-# CHECK: b .+4
+# CHECK: b 0x100100bc
.section .R_PPC_REL32,"ax", at progbits
.long 1f - .
@@ -25,10 +25,10 @@
b 1f at PLT+32768
1:
# CHECK-LABEL: section .R_PPC_PLTREL24:
-# CHECK: b .+4
+# CHECK: b 0x100100c4
.section .R_PPC_LOCAL24PC,"ax", at progbits
b 1f at local
1:
# CHECK-LABEL: section .R_PPC_LOCAL24PC:
-# CHECK: b .+4
+# CHECK: b 0x100100c8
diff --git a/lld/test/ELF/ppc64-call-reach.s b/lld/test/ELF/ppc64-call-reach.s
index b88b146d5528..5f0e2dc47015 100644
--- a/lld/test/ELF/ppc64-call-reach.s
+++ b/lld/test/ELF/ppc64-call-reach.s
@@ -59,15 +59,15 @@ test:
# thunks.
# CHECK-LABEL: test
# CHECK: 10010014: bl 0x12010010
-# CHECK: 10010024: b .+33554428
+# CHECK: 10010024: b 0x12010020
# NEGOFFSET-LABEL: test
# NEGOFFSET: 10010014: bl 0xe010014
-# NEGOFFSET: 10010024: b .+33554432
+# NEGOFFSET: 10010024: b 0xe010024
# THUNK-LABEL: <test>:
# THUNK: 10010014: bl 0x10010028
-# THUNK: 10010024: b .+20
+# THUNK: 10010024: b 0x10010038
# .branch_lt[0]
# THUNK-LABEL: <__long_branch_callee>:
diff --git a/lld/test/ELF/ppc64-reloc-rel.s b/lld/test/ELF/ppc64-reloc-rel.s
index ea7367f38ca0..e086cad7d63c 100644
--- a/lld/test/ELF/ppc64-reloc-rel.s
+++ b/lld/test/ELF/ppc64-reloc-rel.s
@@ -34,7 +34,7 @@ rel16:
.section .R_PPC64_REL24,"ax", at progbits
b rel16
# CHECK-LABEL: Disassembly of section .R_PPC64_REL24:
-# CHECK: b .+67108840
+# CHECK: 100101b0: b 0x10010198
.section .REL32_AND_REL64,"ax", at progbits
.cfi_startproc
diff --git a/lld/test/ELF/ppc64-toc-restore.s b/lld/test/ELF/ppc64-toc-restore.s
index ca5df74f2893..dec760903632 100644
--- a/lld/test/ELF/ppc64-toc-restore.s
+++ b/lld/test/ELF/ppc64-toc-restore.s
@@ -52,7 +52,7 @@ _
diff _object:
noretbranch:
b bar_local
// CHECK-LABEL: <noretbranch>:
-// CHECK: 100102e0: b .+67108832
+// CHECK-NEXT: 100102e0: b 0x100102c0
// CHECK-EMPTY:
// This should come last to check the end-of-buffer condition.
diff --git a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
index d6e0bc285b3a..74c6fd3733f0 100644
--- a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
+++ b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
@@ -67,9 +67,9 @@ static DecodeStatus decodeCondBrTarget(MCInst &Inst, unsigned Imm,
return MCDisassembler::Success;
}
-static DecodeStatus DecodePCRel24BranchTarget(MCInst &Inst, unsigned Imm,
- uint64_t Addr,
- const void *Decoder) {
+static DecodeStatus decodeDirectBrTarget(MCInst &Inst, unsigned Imm,
+ uint64_t /*Address*/,
+ const void * /*Decoder*/) {
int32_t Offset = SignExtend32<24>(Imm);
Inst.addOperand(MCOperand::createImm(Offset));
return MCDisassembler::Success;
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index 3102b9089817..189dd77ab7ed 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -750,7 +750,9 @@ def PPCDirectBrAsmOperand : AsmOperandClass {
def directbrtarget : Operand<OtherVT> {
let PrintMethod = "printBranchOperand";
let EncoderMethod = "getDirectBrEncoding";
+ let DecoderMethod = "decodeDirectBrTarget";
let ParserMatchClass = PPCDirectBrAsmOperand;
+ let OperandType = "OPERAND_PCREL";
}
def absdirectbrtarget : Operand<OtherVT> {
let PrintMethod = "printAbsBranchOperand";
@@ -776,7 +778,7 @@ def abscondbrtarget : Operand<OtherVT> {
def calltarget : Operand<iPTR> {
let PrintMethod = "printBranchOperand";
let EncoderMethod = "getDirectBrEncoding";
- let DecoderMethod = "DecodePCRel24BranchTarget";
+ let DecoderMethod = "decodeDirectBrTarget";
let ParserMatchClass = PPCDirectBrAsmOperand;
let OperandType = "OPERAND_PCREL";
}
diff --git a/llvm/test/CodeGen/PowerPC/alignlongjumptest.mir b/llvm/test/CodeGen/PowerPC/alignlongjumptest.mir
index 56ddb2dc033b..314844a2f3bf 100644
--- a/llvm/test/CodeGen/PowerPC/alignlongjumptest.mir
+++ b/llvm/test/CodeGen/PowerPC/alignlongjumptest.mir
@@ -71,12 +71,12 @@ body: |
# Check for the long branch.
# CHECK-LE: 08 00 82 4{{[01]}} b{{[tf]}} 2, 0xc
-# CHECK-LE-NEXT: fc 7f 00 48 b .+32764
+# CHECK-LE-NEXT: fc 7f 00 48 b 0x8004
# CHECK-LE-DAG: paddi 3, 3, 13, 0
# CHECK-LE-DAG: paddi 3, 3, 21, 0
# CHECK-LE: blr
# CHECK-BE: 4{{[01]}} 82 00 08 b{{[tf]}} 2, 0xc
-# CHECK-BE-NEXT: 48 00 7f fc b .+32764
+# CHECK-BE-NEXT: 48 00 7f fc b 0x8004
# CHECK-BE-DAG: paddi 3, 3, 13, 0
# CHECK-BE-DAG: paddi 3, 3, 21, 0
# CHECK-BE: blr
diff --git a/llvm/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s b/llvm/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s
index f04b7e5c0776..bc0b682530b8 100644
--- a/llvm/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s
+++ b/llvm/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s
@@ -19,9 +19,9 @@ bl:
bl .+4
# CHECK-LABEL: <b>:
-# CHECK-NEXT: b .+67108860
-# CHECK-NEXT: b .+0
-# CHECK-NEXT: b .+4
+# CHECK-NEXT: b 0x8
+# CHECK-NEXT: b 0x10
+# CHECK-NEXT: b 0x18
b:
b .-4
More information about the llvm-commits
mailing list