[PATCH] D77265: Clean up usages of asserting vector getters in Type

[Christopher Tetreault via Phabricator via llvm-commits]

ctetreau created this revision.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.

Remove usages of asserting vector getters in Type in preparation for the
VectorType refactor. The existence of these functions complicates the
refactor while adding little value.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D77265

Files:
  llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp


Index: llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
+++ llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
@@ -342,7 +342,8 @@
 // 3.
 static unsigned getNumVectorRegs(Type *Ty) {
   assert(Ty->isVectorTy() && "Expected vector type");
-  unsigned WideBits = getScalarSizeInBits(Ty) * Ty->getVectorNumElements();
+  unsigned WideBits =
+      getScalarSizeInBits(Ty) * cast<VectorType>(Ty)->getNumElements();
   assert(WideBits > 0 && "Could not compute size of vector");
   return ((WideBits % 128U) ? ((WideBits / 128U) + 1) : (WideBits / 128U));
 }
@@ -442,7 +443,7 @@
       return DivInstrCost;
   }
   else if (ST->hasVector()) {
-    unsigned VF = Ty->getVectorNumElements();
+    unsigned VF = cast<VectorType>(Ty)->getNumElements();
     unsigned NumVectors = getNumVectorRegs(Ty);
 
     // These vector operations are custom handled, but are still supported
@@ -563,8 +564,9 @@
   assert (SrcTy->isVectorTy() && DstTy->isVectorTy());
   assert (SrcTy->getPrimitiveSizeInBits() > DstTy->getPrimitiveSizeInBits() &&
           "Packing must reduce size of vector type.");
-  assert (SrcTy->getVectorNumElements() == DstTy->getVectorNumElements() &&
-          "Packing should not change number of elements.");
+  assert(cast<VectorType>(SrcTy)->getNumElements() ==
+             cast<VectorType>(DstTy)->getNumElements() &&
+         "Packing should not change number of elements.");
 
   // TODO: Since fp32 is expanded, the extract cost should always be 0.
 
@@ -579,7 +581,7 @@
 
   unsigned Cost = 0;
   unsigned Log2Diff = getElSizeLog2Diff(SrcTy, DstTy);
-  unsigned VF = SrcTy->getVectorNumElements();
+  unsigned VF = cast<VectorType>(SrcTy)->getNumElements();
   for (unsigned P = 0; P < Log2Diff; ++P) {
     if (NumParts > 1)
       NumParts /= 2;
@@ -653,7 +655,7 @@
 getBoolVecToIntConversionCost(unsigned Opcode, Type *Dst,
                               const Instruction *I) {
   assert (Dst->isVectorTy());
-  unsigned VF = Dst->getVectorNumElements();
+  unsigned VF = cast<VectorType>(Dst)->getNumElements();
   unsigned Cost = 0;
   // If we know what the widths of the compared operands, get any cost of
   // converting it to match Dst. Otherwise assume same widths.
@@ -702,7 +704,7 @@
   }
   else if (ST->hasVector()) {
     assert (Dst->isVectorTy());
-    unsigned VF = Src->getVectorNumElements();
+    unsigned VF = cast<VectorType>(Src)->getNumElements();
     unsigned NumDstVectors = getNumVectorRegs(Dst);
     unsigned NumSrcVectors = getNumVectorRegs(Src);
 
@@ -829,7 +831,7 @@
     }
   }
   else if (ST->hasVector()) {
-    unsigned VF = ValTy->getVectorNumElements();
+    unsigned VF = cast<VectorType>(ValTy)->getNumElements();
 
     // Called with a compare instruction.
     if (Opcode == Instruction::ICmp || Opcode == Instruction::FCmp) {
@@ -1072,7 +1074,7 @@
   // Return the ceiling of dividing A by B.
   auto ceil = [](unsigned A, unsigned B) { return (A + B - 1) / B; };
 
-  unsigned NumElts = VecTy->getVectorNumElements();
+  unsigned NumElts = cast<VectorType>(VecTy)->getNumElements();
   assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor");
   unsigned VF = NumElts / Factor;
   unsigned NumEltsPerVecReg = (128U / getScalarSizeInBits(VecTy));


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