[PATCH] D77251: [llvm][CodeGen] Addressing modes for SVE ldN/stN.

Francesco Petrogalli via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 1 16:21:19 PDT 2020


fpetrogalli created this revision.
fpetrogalli added reviewers: c-rhodes, efriedma.
Herald added subscribers: llvm-commits, hiraditya, tschuett.
Herald added a project: LLVM.
fpetrogalli added a parent revision: D75751: [AArch64][SVE] Implement structured load intrinsics.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D77251

Files:
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-intrinsics-ldN-reg+imm-addr-mode.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-ldN-reg+reg-addr-mode.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-stN-reg-imm-addr-mode.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-stN-reg-reg-addr-mode.ll

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