[PATCH] D77228: [AMDGPU] Disable 'Skip Uniform Regions' optimization by default; add support for -opt-bisect-limit; update tests.

[Konstantin Pyzhov via Phabricator via llvm-commits]

kpyzhov created this revision.
kpyzhov added reviewers: sameerds, dstuttard.
kpyzhov added a project: AMDGPU.
Herald added subscribers: llvm-commits, kerbowa, hiraditya, t-tye, tpr, yaxunl, nhaehnle, wdng, jvesely, kzhuravl, arsenm, qcolombet, MatzeB.
Herald added a project: LLVM.

Disable the 'Skip Uniform Regions' optimization in the 'Structurize CFG' pass by default since it causes several functional issues in HIP applications.
The optimization still can be turned on manually by using the "-structurizecfg-relaxed-uniform-regions" option.
The LIT tests affected by this change are updated.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D77228

Files:
  llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
  llvm/test/CodeGen/AMDGPU/branch-relaxation-debug-info.ll
  llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
  llvm/test/CodeGen/AMDGPU/branch-uniformity.ll
  llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
  llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
  llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
  llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
  llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
  llvm/test/CodeGen/AMDGPU/early-if-convert.ll
  llvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
  llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
  llvm/test/CodeGen/AMDGPU/infinite-loop.ll
  llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
  llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
  llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
  llvm/test/CodeGen/AMDGPU/salu-to-valu.ll
  llvm/test/CodeGen/AMDGPU/sdiv64.ll
  llvm/test/CodeGen/AMDGPU/setcc.ll
  llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
  llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
  llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
  llvm/test/CodeGen/AMDGPU/srem64.ll
  llvm/test/CodeGen/AMDGPU/udiv64.ll
  llvm/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll
  llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
  llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll
  llvm/test/CodeGen/AMDGPU/urem64.ll
  llvm/test/CodeGen/AMDGPU/valu-i1.ll
  llvm/test/CodeGen/AMDGPU/wqm.ll

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