[lld] 4af7560 - [PPCInstPrinter] Print conditional branches as `bt 2, $target` instead of `bt 2, .+$imm`
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 31 15:05:47 PDT 2020
Author: Fangrui Song
Date: 2020-03-31T15:05:38-07:00
New Revision: 4af7560b3751259c4acf63411f42ab5c9989ef26
URL: https://github.com/llvm/llvm-project/commit/4af7560b3751259c4acf63411f42ab5c9989ef26
DIFF: https://github.com/llvm/llvm-project/commit/4af7560b3751259c4acf63411f42ab5c9989ef26.diff
LOG: [PPCInstPrinter] Print conditional branches as `bt 2, $target` instead of `bt 2, .+$imm`
Follow-up of D76591.
Reviewed By: #powerpc, sfertile
Differential Revision: https://reviews.llvm.org/D76907
Added:
Modified:
lld/test/ELF/ppc32-call-stub-pic.s
lld/test/ELF/ppc32-long-thunk.s
lld/test/ELF/ppc32-reloc-rel.s
lld/test/ELF/ppc64-reloc-rel.s
lld/test/ELF/ppc64-split-stack-adjust-overflow.s
lld/test/ELF/ppc64-split-stack-adjust-size-success.s
lld/test/ELF/ppc64-split-stack-prologue-adjust-success.s
llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/test/CodeGen/PowerPC/aix-return55.ll
llvm/test/CodeGen/PowerPC/alignlongjumptest.mir
llvm/test/MC/PowerPC/ppc64-prefix-align.s
llvm/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s
llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test
Removed:
################################################################################
diff --git a/lld/test/ELF/ppc32-call-stub-pic.s b/lld/test/ELF/ppc32-call-stub-pic.s
index 2c116c596e86..179874620f31 100644
--- a/lld/test/ELF/ppc32-call-stub-pic.s
+++ b/lld/test/ELF/ppc32-call-stub-pic.s
@@ -33,7 +33,7 @@
## .got2+0x8000-0x10004 = 0x30000+0x8000-0x10004 = 65536*2+32764
# CHECK-LABEL: <_start>:
-# CHECK-NEXT: bcl 20, 31, .+4
+# PIE-NEXT: bcl 20, 31, 0x10210
# PIE-NEXT: 10210: mflr 30
# PIE-NEXT: addis 30, 30, 3
# PIE-NEXT: addi 30, 30, -32412
@@ -52,6 +52,7 @@
# PIE-NEXT: bl 0x10274
## bl 00008000.plt_pic32.f
# PIE-NEXT: bl 0x10284
+# SHARED-NEXT: bcl 20, 31, 0x10230
# SHARED-NEXT: 10230: mflr 30
# SHARED-NEXT: addis 30, 30, 3
# SHARED-NEXT: addi 30, 30, -32420
@@ -116,9 +117,8 @@
## Operand of addi: 0x100a8-.glink = 24
# CHECK-NEXT: addis 11, 11, 0
# CHECK-NEXT: mflr 0
-# CHECK-NEXT: bcl 20, 31, .+4
-# PIE-NEXT: 102ac: addi 11, 11, 24
-# SHARED-NEXT: 102cc: addi 11, 11, 24
+# CHECK-NEXT: bcl 20, 31, 0x[[#%x,NEXT:]]
+# CHECK-NEXT: [[#%x,NEXT]]: addi 11, 11, 24
# CHECK-NEXT: mflr 12
# CHECK-NEXT: mtlr 0
diff --git a/lld/test/ELF/ppc32-long-thunk.s b/lld/test/ELF/ppc32-long-thunk.s
index 57c442f7723d..90c284ded5fa 100644
--- a/lld/test/ELF/ppc32-long-thunk.s
+++ b/lld/test/ELF/ppc32-long-thunk.s
@@ -40,7 +40,7 @@
## high-0x2028 = 0x02002008-0x2020 = 65536*512-24
# PI: <__LongThunk_high>:
# PI-NEXT: 2018: mflr 0
-# PI-NEXT: bcl 20, 31, .+4
+# PI-NEXT: bcl 20, 31, 0x2020
# PI-NEXT: 2020: mflr 12
# PI-NEXT: addis 12, 12, 512
# PI-NEXT: addi 12, 12, -24
@@ -51,7 +51,7 @@
## .text_high+16-0x2048 = 0x02002010-0x2048 = 65536*512-48
# PI: <__LongThunk_>:
# PI-NEXT: 2038: mflr 0
-# PI-NEXT: bcl 20, 31, .+4
+# PI-NEXT: bcl 20, 31, 0x2040
# PI-NEXT: 2040: mflr 12
# PI-NEXT: addis 12, 12, 512
# PI-NEXT: addi 12, 12, -48
diff --git a/lld/test/ELF/ppc32-reloc-rel.s b/lld/test/ELF/ppc32-reloc-rel.s
index 49d149550aae..b2bd0a461ca1 100644
--- a/lld/test/ELF/ppc32-reloc-rel.s
+++ b/lld/test/ELF/ppc32-reloc-rel.s
@@ -7,7 +7,7 @@
beq 1f
1:
# CHECK-LABEL: section .R_PPC_REL14:
-# CHECK: bt 2, .+4
+# CHECK: 100100b4: bt 2, 0x100100b8
.section .R_PPC_REL24,"ax", at progbits
b 1f
diff --git a/lld/test/ELF/ppc64-reloc-rel.s b/lld/test/ELF/ppc64-reloc-rel.s
index be64a4f767ac..ea7367f38ca0 100644
--- a/lld/test/ELF/ppc64-reloc-rel.s
+++ b/lld/test/ELF/ppc64-reloc-rel.s
@@ -12,7 +12,7 @@
beq 1f
1:
# CHECK-LABEL: Disassembly of section .R_PPC64_REL14:
-# CHECK: bt 2, .+4
+# CHECK: bt 2, 0x10010198
.section .R_PPC64_REL16,"ax", at progbits
.globl rel16
diff --git a/lld/test/ELF/ppc64-split-stack-adjust-overflow.s b/lld/test/ELF/ppc64-split-stack-adjust-overflow.s
index b1a104474f10..f9bbf6176af5 100644
--- a/lld/test/ELF/ppc64-split-stack-adjust-overflow.s
+++ b/lld/test/ELF/ppc64-split-stack-adjust-overflow.s
@@ -59,6 +59,6 @@ caller:
# CHECK-NEXT: addis 12, 1, -32768
# CHECK-NEXT: nop
# CHECK-NEXT: cmpld 7, 12, 0
-# CHECK-NEXT: bt- 28, .+36
+# CHECK-NEXT: bt- 28, 0x10010204
.section .note.GNU-split-stack,"", at progbits
diff --git a/lld/test/ELF/ppc64-split-stack-adjust-size-success.s b/lld/test/ELF/ppc64-split-stack-adjust-size-success.s
index 63e0b414dc09..27fbb95c01df 100644
--- a/lld/test/ELF/ppc64-split-stack-adjust-size-success.s
+++ b/lld/test/ELF/ppc64-split-stack-adjust-size-success.s
@@ -58,21 +58,21 @@ caller:
# CHECK-NEXT: addis 12, 1, -1
# CHECK-NEXT: addi 12, 12, 32736
# CHECK-NEXT: cmpld 7, 12, 0
-# CHECK-NEXT: bt- 28, .+36
+# CHECK-NEXT: bt- 28, 0x10010204
# SMALL-LABEL: caller
# SMALL: ld 0, -28736(13)
# SMALL-NEXT: addi 12, 1, -4128
# SMALL-NEXT: nop
# SMALL-NEXT: cmpld 7, 12, 0
-# SMALL-NEXT: bt- 28, .+36
+# SMALL-NEXT: bt- 28, 0x10010204
# ZERO-LABEL: caller
# ZERO: ld 0, -28736(13)
# ZERO-NEXT: addi 12, 1, -32
# ZERO-NEXT: nop
# ZERO-NEXT: cmpld 7, 12, 0
-# ZERO-NEXT: bt- 28, .+36
+# ZERO-NEXT: bt- 28, 0x10010204
.p2align 2
.global main
.type main, @function
diff --git a/lld/test/ELF/ppc64-split-stack-prologue-adjust-success.s b/lld/test/ELF/ppc64-split-stack-prologue-adjust-success.s
index 197df150c495..0bd6f143a585 100644
--- a/lld/test/ELF/ppc64-split-stack-prologue-adjust-success.s
+++ b/lld/test/ELF/ppc64-split-stack-prologue-adjust-success.s
@@ -54,7 +54,7 @@ caller_small_stack:
# CHECK-NEXT: addi 12, 1, -16416
# CHECK-NEXT: nop
# CHECK-NEXT: cmpld 7, 12, 0
-# CHECK-NEXT: bt- 28, .+36
+# CHECK-NEXT: bt- 28, 0x10010204
# A caller that has a stack size that fits whithin 16 bits, but the adjusted
# stack size after prologue adjustment now overflows 16 bits needing both addis
@@ -132,7 +132,7 @@ caller_large_stack:
# CHECK-NEXT: addis 12, 1, -1
# CHECK-NEXT: addi 12, 12, -16416
# CHECK-NEXT: cmpld 7, 12, 0
-# CHECK-NEXT: bt- 28, .+44
+# CHECK-NEXT: bt- 28, 0x100102bc
# A caller with a stack size that is larger then 16 bits, but aligned such that
# the addi instruction is unneeded.
@@ -174,7 +174,7 @@ caller_large_aligned_stack:
# CHECK-NEXT: addis 12, 1, -2
# CHECK-NEXT: addi 12, 12, -16384
# CHECK-NEXT: cmpld 7, 12, 0
-# CHECK-NEXT: bt- 28, .+40
+# CHECK-NEXT: bt- 28, 0x10010318
# main only calls split-stack functions or __morestack so
# there should be no adjustment of its split-stack prologue.
diff --git a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
index 49c2790d7caa..d6e0bc285b3a 100644
--- a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
+++ b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
@@ -60,6 +60,13 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCDisassembler() {
createPPCLEDisassembler);
}
+static DecodeStatus decodeCondBrTarget(MCInst &Inst, unsigned Imm,
+ uint64_t /*Address*/,
+ const void * /*Decoder*/) {
+ Inst.addOperand(MCOperand::createImm(SignExtend32<14>(Imm)));
+ return MCDisassembler::Success;
+}
+
static DecodeStatus DecodePCRel24BranchTarget(MCInst &Inst, unsigned Imm,
uint64_t Addr,
const void *Decoder) {
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index 6c48512d8fb6..3102b9089817 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -764,7 +764,9 @@ def PPCCondBrAsmOperand : AsmOperandClass {
def condbrtarget : Operand<OtherVT> {
let PrintMethod = "printBranchOperand";
let EncoderMethod = "getCondBrEncoding";
+ let DecoderMethod = "decodeCondBrTarget";
let ParserMatchClass = PPCCondBrAsmOperand;
+ let OperandType = "OPERAND_PCREL";
}
def abscondbrtarget : Operand<OtherVT> {
let PrintMethod = "printAbsBranchOperand";
diff --git a/llvm/test/CodeGen/PowerPC/aix-return55.ll b/llvm/test/CodeGen/PowerPC/aix-return55.ll
index 0aa49e68ff02..a18a211b46b2 100644
--- a/llvm/test/CodeGen/PowerPC/aix-return55.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-return55.ll
@@ -31,7 +31,7 @@ entry:
;CHECKOBJ-NEXT: 18: 00 01 23 45 <unknown>
;CHECKOBJ-NEXT: 1c: 67 8a bc de oris 10, 28, 48350{{[[:space:]] *}}
;CHECKOBJ-NEXT: 00000020 <d>:
-;CHECKOBJ-NEXT: 20: 40 14 00 00 bdnzf 20, $+0
+;CHECKOBJ-NEXT: 20: 40 14 00 00 bdnzf 20, 0x20
;CHECKOBJ-NEXT: 24: 00 00 00 00 <unknown>{{[[:space:]] *}}
;CHECKOBJ-NEXT: 00000028 <foo>:
;CHECKOBJ-NEXT: 28: 00 00 00 00 <unknown>
diff --git a/llvm/test/CodeGen/PowerPC/alignlongjumptest.mir b/llvm/test/CodeGen/PowerPC/alignlongjumptest.mir
index 2ec09b0fb26b..56ddb2dc033b 100644
--- a/llvm/test/CodeGen/PowerPC/alignlongjumptest.mir
+++ b/llvm/test/CodeGen/PowerPC/alignlongjumptest.mir
@@ -70,12 +70,12 @@ body: |
...
# Check for the long branch.
-# CHECK-LE: 08 00 82 4{{[01]}} b{{[tf]}} 2, .+8
+# CHECK-LE: 08 00 82 4{{[01]}} b{{[tf]}} 2, 0xc
# CHECK-LE-NEXT: fc 7f 00 48 b .+32764
# CHECK-LE-DAG: paddi 3, 3, 13, 0
# CHECK-LE-DAG: paddi 3, 3, 21, 0
# CHECK-LE: blr
-# CHECK-BE: 4{{[01]}} 82 00 08 b{{[tf]}} 2, .+8
+# CHECK-BE: 4{{[01]}} 82 00 08 b{{[tf]}} 2, 0xc
# CHECK-BE-NEXT: 48 00 7f fc b .+32764
# CHECK-BE-DAG: paddi 3, 3, 13, 0
# CHECK-BE-DAG: paddi 3, 3, 21, 0
diff --git a/llvm/test/MC/PowerPC/ppc64-prefix-align.s b/llvm/test/MC/PowerPC/ppc64-prefix-align.s
index 80d2f0722a76..29594e9e33ae 100644
--- a/llvm/test/MC/PowerPC/ppc64-prefix-align.s
+++ b/llvm/test/MC/PowerPC/ppc64-prefix-align.s
@@ -13,10 +13,10 @@
beq 0, LAB1 # 4
beq 1, LAB2 # 8
-# CHECK-BE: 0: 41 82 00 c0 bt 2, .+192
-# CHECK-BE-NEXT: 4: 41 86 00 f8 bt 6, .+248
-# CHECK-LE: 0: c0 00 82 41 bt 2, .+192
-# CHECK-LE-NEXT: 4: f8 00 86 41 bt 6, .+248
+# CHECK-BE: 0: 41 82 00 c0 bt 2, 0xc0
+# CHECK-BE-NEXT: 4: 41 86 00 f8 bt 6, 0xfc
+# CHECK-LE: 0: c0 00 82 41 bt 2, 0xc0
+# CHECK-LE-NEXT: 4: f8 00 86 41 bt 6, 0xfc
paddi 1, 2, 8589934576, 0 # 16
paddi 1, 2, 8589934576, 0 # 24
paddi 1, 2, 8589934576, 0 # 32
diff --git a/llvm/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s b/llvm/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s
index 73e3a68c6d9c..f04b7e5c0776 100644
--- a/llvm/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s
+++ b/llvm/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s
@@ -29,7 +29,9 @@ b:
b .+4
# CHECK-LABEL: <bt>:
-# CHECK-NEXT: bt 2, .+65532
+# CHECK-NEXT: 18: bt 2, 0x14
+# CHECK-NEXT: 1c: bt 1, 0x20
bt:
bt 2, .-4
+ bgt .+4
diff --git a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test
index 556a8e1c62e0..1dee2aa2d52a 100644
--- a/llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test
+++ b/llvm/test/tools/llvm-objdump/XCOFF/disassemble-all.test
@@ -55,7 +55,7 @@ CHECK: 000000a4 <a>:
CHECK-NEXT: ...
CHECK: Disassembly of section .tdata:
CHECK: 00000000 <d>:
-CHECK-NEXT: 0: 40 09 21 f9 bdnzfl 9, $+8696
+CHECK-NEXT: 0: 40 09 21 f9 bdnzfl 9, 0x21f8
CHECK-NEXT: 4: f0 1b 86 6e <unknown>
CHECK: Disassembly of section .tbss:
CHECK: 00000008 <c>:
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