[PATCH] D74873: [AMDGPU] Define 16 bit VGPR subregs
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 31 11:59:37 PDT 2020
This revision was automatically updated to reflect the committed changes.
Closed by commit rG08682dcc8631: [AMDGPU] Define 16 bit VGPR subregs (authored by rampitec).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D74873/new/
https://reviews.llvm.org/D74873
Files:
llvm/lib/Target/AMDGPU/AMDGPURegisterBanks.td
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
llvm/lib/Target/AMDGPU/SIRegisterInfo.h
llvm/lib/Target/AMDGPU/SIRegisterInfo.td
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
llvm/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir
llvm/test/CodeGen/AMDGPU/ipra-regmask.ll
llvm/test/CodeGen/AMDGPU/load-hi16.ll
llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir
llvm/test/CodeGen/AMDGPU/postra-machine-sink.mir
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D74873.253951.patch
Type: text/x-patch
Size: 51940 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200331/2756154b/attachment.bin>
More information about the llvm-commits
mailing list