[PATCH] D76901: [AArch64][SVE] Add support for boolean logic and fcmp.

Eli Friedman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 31 11:58:53 PDT 2020


efriedma marked an inline comment as done.
efriedma added inline comments.


================
Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:1376
+                               !cast<Instruction>(NAME), PTRUE_B>;
+  def : SVE_2_Op_AllActive_Pat<nxv8i1, op_nopred, nxv8i1, nxv8i1,
+                               !cast<Instruction>(NAME), PTRUE_H>;
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sdesmalen wrote:
> This file doesn't seem too strict on the 80char limit, so I think having this on the same line would make it more readable.
It's not strict, yes, but I think going over 100 columns is probably not a good idea.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D76901/new/

https://reviews.llvm.org/D76901





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