[PATCH] D77152: [SelectionDAG] Better legalization for FSHL and FSHR
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 31 09:59:55 PDT 2020
foad created this revision.
foad added reviewers: RKSimon, spatel, arsenm, nikic.
Herald added subscribers: llvm-commits, kerbowa, hiraditya, nhaehnle, wdng, jvesely, nemanjai.
Herald added a project: LLVM.
In SelectionDAGBuilder always translate the fshl and fshr intrinsics to
FSHL and FSHR instead of lowering them to shifts and ORs. Improve the
legalization of FSHL and FSHR to try to avoid code quality regressions.
TODO: there are code quality regressions in the tests
TODO: a few X86 tests crash because I haven't implemented expansion
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D77152
Files:
llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/test/CodeGen/AArch64/funnel-shift-rot.ll
llvm/test/CodeGen/AArch64/funnel-shift.ll
llvm/test/CodeGen/AArch64/shift-by-signext.ll
llvm/test/CodeGen/AMDGPU/fshl.ll
llvm/test/CodeGen/AMDGPU/fshr.ll
llvm/test/CodeGen/PowerPC/funnel-shift-rot.ll
llvm/test/CodeGen/PowerPC/funnel-shift.ll
llvm/test/CodeGen/X86/rotate_vec.ll
llvm/test/CodeGen/X86/vector-fshl-128.ll
llvm/test/CodeGen/X86/vector-fshl-256.ll
llvm/test/CodeGen/X86/vector-fshl-512.ll
llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
llvm/test/CodeGen/X86/vector-fshl-rot-512.ll
llvm/test/CodeGen/X86/vector-fshr-128.ll
llvm/test/CodeGen/X86/vector-fshr-256.ll
llvm/test/CodeGen/X86/vector-fshr-512.ll
llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
llvm/test/CodeGen/X86/vector-fshr-rot-512.ll
llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
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