[PATCH] D77101: [AIX] Return the correct set of callee saved regs

[David Tenty via Phabricator via llvm-commits]

daltenty created this revision.
daltenty added reviewers: sfertile, ZarkoCA, cebowleratibm, jasonliu.
Herald added subscribers: llvm-commits, kbarton, hiraditya, nemanjai.
Herald added a project: LLVM.
daltenty updated this revision to Diff 253727.
daltenty added a comment.
Herald added a subscriber: wuzish.

- Add newline to test


r13 isn't reserved on 32-bit AIX, which is reflected in our calling
convention but not callee saved regs.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D77101

Files:
  llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
  llvm/test/CodeGen/PowerPC/aix-calleesavedregs.ll


Index: llvm/test/CodeGen/PowerPC/aix-calleesavedregs.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/aix-calleesavedregs.ll
@@ -0,0 +1,11 @@
+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
+; RUN:  -mtriple powerpc-ibm-aix-xcoff -O0 < %s | \
+; RUN: FileCheck --check-prefixes=CHECK %s
+
+define void @usethirteen() {
+    call void asm "nop", "~{r13}"()
+    ret void
+}
+
+; CHECK: stw 13, -4(1)
+; CHECK: lwz 13, -4(1)
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -142,6 +142,8 @@
 PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
   const PPCSubtarget &Subtarget = MF->getSubtarget<PPCSubtarget>();
   if (MF->getFunction().getCallingConv() == CallingConv::AnyReg) {
+    if (!TM.isPPC64() && Subtarget.isAIXABI())
+      report_fatal_error("AnyReg unimplemented on 32-bit AIX.");
     if (Subtarget.hasVSX())
       return CSR_64_AllRegs_VSX_SaveList;
     if (Subtarget.hasAltivec())
@@ -149,14 +151,19 @@
     return CSR_64_AllRegs_SaveList;
   }
 
-  if (TM.isPPC64() && MF->getInfo<PPCFunctionInfo>()->isSplitCSR())
+  if (TM.isPPC64() && MF->getInfo<PPCFunctionInfo>()->isSplitCSR()) {
+    if (Subtarget.isAIXABI())
+      report_fatal_error("SplitCSR unimplemented on AIX.");
     return CSR_SRV464_TLS_PE_SaveList;
+  }
 
   // On PPC64, we might need to save r2 (but only if it is not reserved).
   bool SaveR2 = MF->getRegInfo().isAllocatable(PPC::X2);
 
   // Cold calling convention CSRs.
   if (MF->getFunction().getCallingConv() == CallingConv::Cold) {
+    if (Subtarget.isAIXABI())
+      report_fatal_error("Cold calling unimplemented on AIX.");
     if (TM.isPPC64()) {
       if (Subtarget.hasAltivec())
         return SaveR2 ? CSR_SVR64_ColdCC_R2_Altivec_SaveList
@@ -173,6 +180,8 @@
   }
   // Standard calling convention CSRs.
   if (TM.isPPC64()) {
+    if (Subtarget.isAIXABI())
+      return CSR_AIX64_SaveList;
     if (Subtarget.hasAltivec())
       return SaveR2 ? CSR_SVR464_R2_Altivec_SaveList
                     : CSR_SVR464_Altivec_SaveList;
@@ -180,6 +189,8 @@
                   : CSR_SVR464_SaveList;
   }
   // 32-bit targets.
+  if (Subtarget.isAIXABI())
+    return CSR_AIX32_SaveList;
   if (Subtarget.hasAltivec())
     return CSR_SVR432_Altivec_SaveList;
   else if (Subtarget.hasSPE())


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