[PATCH] D75388: Expand interleaved memory access pass to identify certain shuffle_vector and transform it into target specific intrinsics.

[Wei Zhao via Phabricator via llvm-commits]

wxz2020 updated this revision to Diff 253724.
wxz2020 added a comment.

Move the creation of the Tbl1 instruction's mask from LLVM generic code to AArch64 target specific code.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D75388/new/

https://reviews.llvm.org/D75388

Files:
  llvm/include/llvm/Analysis/TargetTransformInfo.h
  llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
  llvm/include/llvm/CodeGen/BasicTTIImpl.h
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/Analysis/TargetTransformInfo.cpp
  llvm/lib/CodeGen/InterleavedAccessPass.cpp
  llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
  llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

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