[PATCH] D74316: AMDGPU/GlobalISel: Start selecting image intrinsics

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 30 13:04:34 PDT 2020


arsenm marked an inline comment as done.
arsenm added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll:77-79
+; GFX9-NEXT:    s_lshl_b32 s12, s0, 16
+; GFX9-NEXT:    v_and_or_b32 v0, v0, v3, v1
+; GFX9-NEXT:    v_and_or_b32 v1, v2, v3, s12
----------------
Flakebi wrote:
> It looks like the code should produce correct results but why is s0/s12 put into the undefined part?
We're really missing any combines necessary to cleanup legalization 


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74316/new/

https://reviews.llvm.org/D74316





More information about the llvm-commits mailing list