[PATCH] D77019: AMDGPU/GlobalISel: Form CVT_F32_UBYTE0

[Jay Foad via Phabricator via llvm-commits]

foad accepted this revision.
foad added a comment.
This revision is now accepted and ready to land.

LGTM.



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Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/combine-itofp.mir:15
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+    ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
+    ; CHECK: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]]
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Is there a plan for removing this redundant AND?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77019/new/

https://reviews.llvm.org/D77019