[PATCH] D76709: [Target][ARM] Adding MVE VPT Optimisation Pass

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh marked 7 inline comments as done.
Pierre-vh added inline comments.


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Comment at: llvm/lib/Target/ARM/MVEVPTOptimisationsPass.cpp:141
+MachineInstrBuilder
+MVEVPTOptimisations::BuildVPNOTBefore(MachineBasicBlock &MBB,
+                                      MachineInstr &Instr) {
----------------
dmgreen wrote:
> How much does this function add? It doesn't seem to do a huge amount.
Sure, it doesn't add much, I'll remove it.


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Comment at: llvm/lib/Target/ARM/MVEVPTOptimisationsPass.cpp:158-159
+    // Ignore predicated instructions.
+    if (getVPTInstrPredicate(Instr) != ARMVCC::None)
+      continue;
+
----------------
dmgreen wrote:
> Do you have any tests for this bit?
Not yet, I'll add some.


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Comment at: llvm/test/CodeGen/Thumb2/mve-vpt-optimisations.mir:154-155
+    liveins: $q0, $q1
+    renamable $vpr = MVE_VCMPf16 renamable $q0, renamable $q1, 10, 0, $noreg
+    renamable $vpr = MVE_VCMPf16 renamable $q0, renamable $q1, 11, 0, $noreg
+
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dmgreen wrote:
> I was expecting these registers to be virtual, given where this is in the pipeline. Will they be physical instead?
In the pipeline, they'd be virtual.
Should I replace all $vpr/$q0/$q1 here with virtual registers ? It won't make much of a difference testing wise but I can understand that virtual registers would be preferred. 


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D76709/new/

https://reviews.llvm.org/D76709