[PATCH] D76984: [X86][SSE] Handle basic inversion of PTEST/TESTP operands (PR38522)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

In D76984#1948186 <https://reviews.llvm.org/D76984#1948186>, @craig.topper wrote:

> This feels subject to DAG combine ordering not folding the cmov+setcc before this combine gets a chance to run. Would this be simpler if we just did it at the intrinsic lowering stage?


The problem we're going to hit is that most of the xor(X,-1) inversions cases are coming from comparison lowering - PR38522 in particular hits this. What about if I extend the CondCode cases handled? I was thinking about adding a thorough 'X86::GetComplementCondCode' helper, and possibly one that checks which flag bits are read.


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