[PATCH] D72930: [FEnv] Constfold some unary constrained operations

[Kevin P. Neal via Phabricator via llvm-commits]

kpn added a comment.

It looks like a whole bunch of instructions got converted into simple loads. Which is exactly what was expected.

LGTM.



================
Comment at: llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll:6444
+; PC64LE-NEXT:    fmr 2, 1
+; PC64LE-NEXT:    fmr 3, 1
 ; PC64LE-NEXT:    blr
----------------
Now that I look at this, it might have been nice if all along we'd been writing test cases that gave some different values for the vector elements. Oh well. I doubt it's worth changing now.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D72930/new/

https://reviews.llvm.org/D72930