[PATCH] D76766: [ARM][LowOverheadLoops] DoubleWidthResult instructions canGenerateZeros

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer accepted this revision.
SjoerdMeijer added a comment.
This revision is now accepted and ready to land.

Cheers, with some nits addressed this looks good.



================
Comment at: llvm/test/CodeGen/Thumb2/LowOverheadLoops/vaddv.mir:754
 
+  define hidden i32 @illegal_vmull_non_zero(i16* %x, i16* %y, i16* %z, i32 %n) {
+  entry:
----------------
samparker wrote:
> SjoerdMeijer wrote:
> > Do we need to test some other opcodes too that have been marked as DoubleWidth? Like MVE_VSHLL, VMOVL, VQDMULL? Or is this perhaps already tested elsewhere?
> I want to use the unit test to cover the opcodes, and this test was to check that the logic in the pass was reading the flags correctly.
Ah yeah, somehow I keep forgetting these unit tests.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D76766/new/

https://reviews.llvm.org/D76766