[PATCH] D76882: [AMDGPU] Implement CFI for non-kernel functions

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:613
+  const MCRegisterInfo *MCRI = MF.getMMI().getContext().getRegisterInfo();
+  unsigned StackPtrReg =
+      MF.getInfo<SIMachineFunctionInfo>()->getStackPtrOffsetReg();
----------------
Register


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Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:626
+      8,  // length
+      static_cast<char>(unsigned(dwarf::DW_OP_regx)),
+      62, // SGPR30
----------------
Double cast


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Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:639
+
+  static const unsigned CallerSavedRegs[] = {
+      AMDGPU::VGPR0,     AMDGPU::VGPR1,  AMDGPU::VGPR2,  AMDGPU::VGPR3,
----------------
MCPhysReg?


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Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:854
                              : NumBytes;
+  const unsigned StackPtrReg = FuncInfo->getStackPtrOffsetReg();
+  const unsigned FramePtrReg = FuncInfo->getFrameOffsetReg();
----------------
Register


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Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.h:89
+                                  const DebugLoc &DL, const unsigned SGPR,
+                                  const unsigned VGPR, const int Lane) const;
 };
----------------
s/unsigned/Register


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  https://reviews.llvm.org/D76882/new/

https://reviews.llvm.org/D76882