[PATCH] D76881: [AMDGPU] Skip CFIInstructions in SIInsertWaitcnts

[Scott Linder via Phabricator via llvm-commits]

scott.linder created this revision.
Herald added subscribers: llvm-commits, kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl, arsenm.
Herald added a project: LLVM.

CFI emitted during PEI at the beginning of the prologue needs to apply
to any inserted waitcnts on function entry.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D76881

Files:
  llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp


Index: llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -1640,13 +1640,17 @@
     // TODO: Could insert earlier and schedule more liberally with operations
     // that only use caller preserved registers.
     MachineBasicBlock &EntryBB = MF.front();
+    MachineBasicBlock::iterator I = EntryBB.begin();
+    for (MachineBasicBlock::iterator E = EntryBB.end();
+         I != E && (I->isPHI() || I->isCFIInstruction()); ++I)
+      ;
+    BuildMI(EntryBB, I, DebugLoc(), TII->get(AMDGPU::S_WAITCNT))
+      .addImm(0);
     if (ST->hasVscnt())
-      BuildMI(EntryBB, EntryBB.getFirstNonPHI(), DebugLoc(),
+      BuildMI(EntryBB, I, DebugLoc(),
               TII->get(AMDGPU::S_WAITCNT_VSCNT))
       .addReg(AMDGPU::SGPR_NULL, RegState::Undef)
       .addImm(0);
-    BuildMI(EntryBB, EntryBB.getFirstNonPHI(), DebugLoc(), TII->get(AMDGPU::S_WAITCNT))
-      .addImm(0);
 
     Modified = true;
   }


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