[llvm] 1e30396 - [RISCV] Support negative constants in CompressInstEmitter

[Simon Cook via llvm-commits]

Author: Simon Cook
Date: 2020-03-26T15:23:38Z
New Revision: 1e303962232d624704d0102d8e9dbb62cca8fb99

URL: https://github.com/llvm/llvm-project/commit/1e303962232d624704d0102d8e9dbb62cca8fb99
DIFF: https://github.com/llvm/llvm-project/commit/1e303962232d624704d0102d8e9dbb62cca8fb99.diff

LOG: [RISCV] Support negative constants in CompressInstEmitter

Summary:
Some compressed instructions match against negative values; store
immediates as a signed value such that these patterns will now match
the intended instructions.

Reviewers: asb, lenary, PaoloS

Reviewed By: asb

Subscribers: rbar, johnrusso, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, evandro, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76767

Added: 
    

Modified: 
    llvm/utils/TableGen/RISCVCompressInstEmitter.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp b/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
index e64a2327f045..f298e639bf7f 100644
--- a/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
+++ b/llvm/utils/TableGen/RISCVCompressInstEmitter.cpp
@@ -85,7 +85,7 @@ class RISCVCompressInstEmitter {
     MapKind Kind;
     union {
       unsigned Operand; // Operand number mapped to.
-      uint64_t Imm;     // Integer immediate value.
+      int64_t Imm;      // Integer immediate value.
       Record *Reg;      // Physical register.
     } Data;
     int TiedOpIdx = -1; // Tied operand index within the instruction.