[PATCH] D76766: [ARM][LowOverheadLoops] DoubleWidthResult instructions canGenerateZeros

[Sam Parker via Phabricator via llvm-commits]

samparker created this revision.
samparker added reviewers: SjoerdMeijer, dmgreen.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: LLVM.
samparker added a parent revision: D76762: [ARM][MVE] Add DoubleWidthResult flag.

Given that some instructions generate wider result elements than their inputs, flag them as being able to generate non zeros in the false lanes.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D76766

Files:
  llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/vaddv.mir

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