[PATCH] D76751: [PowerPC] Improve the way legalize mul for v8i16 and add pattern to match mul + add

qshanz via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 25 04:17:55 PDT 2020


steven.zhang marked an inline comment as done.
steven.zhang added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCInstrAltivec.td:876
+// Add
+def : Pat<(add v8i16:$vA, (mul v8i16:$vB, v8i16:$vC)), (VMLADDUHM $vA, $vB, $vC)>;
+
----------------
nemanjai wrote:
> Huh? Is this right? Doesn't the instruction do `$vA * $vB + $vC`? So wouldn't that mean that we need the input pattern to be `(add v8i16:$vC, (mul v8i16:$vA, v8i16:$vB))`? Or the output to be `(VMLADDUHM $vB, $vC, $vA)` if we are leaving the input the same.
Oops! You are right.


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https://reviews.llvm.org/D76751





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