[PATCH] D76709: [Target][ARM] Adding MVE VPT Optimisation Pass
Pierre van Houtryve via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 24 08:34:47 PDT 2020
Pierre-vh created this revision.
Pierre-vh added reviewers: dmgreen, SjoerdMeijer, samparker, simon_tatham, olista01.
Herald added subscribers: llvm-commits, danielkiss, hiraditya, kristof.beyls, mgorny.
Herald added a project: LLVM.
Pierre-vh added a parent revision: D75993: [Target][ARM] Improvements to the VPT Block Insertion Pass.
This patch adds a pass called "MVE VPT Optimisations", which does a few optimisations before register allocation.
The goal of this pass is to maximize the size of the VPT blocks created by the MVE VPT Block Insertion pass.
Currently, this pass:
- Replaces VPCMPs with VPNOTs when possible.
- The instruction selector in its current state doesn't generate VPNOTs very often. Instead, it generates a VCMP with the operands swapped and the condition reversed. This pass spots those VCMPs and transforms them into VPNOTs.
- Why generate more VPNOTs? So the MVE VPT Block Insertion pass can use them (& remove them) to create larger/more complex VPT blocks (e.g. `TEET`, `TETE`, etc.)
- Replaces usages of old VPR values with VPNOTs when inside a block of predicated instructions.
- This is done to avoid overlapping lifetimes of different VPR values, reducing the chance that a spill/reload occurs.
- Why ? Spill/reloads of VPR are particularly harmful to the MVE VPT Block Insertion Pass: it prevents it from creating large VPT blocks.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D76709
Files:
llvm/lib/Target/ARM/ARM.h
llvm/lib/Target/ARM/ARMTargetMachine.cpp
llvm/lib/Target/ARM/CMakeLists.txt
llvm/lib/Target/ARM/MVEVPTOptimisationsPass.cpp
llvm/test/CodeGen/ARM/O3-pipeline.ll
llvm/test/CodeGen/Thumb2/mve-vcmpf.ll
llvm/test/CodeGen/Thumb2/mve-vpt-optimisations.mir
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